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authorWe-unite <3205135446@qq.com>2025-03-08 22:04:20 +0800
committerWe-unite <3205135446@qq.com>2025-03-08 22:04:20 +0800
commita07bb8fd1299070229f0e8f3dcb57ffd5ef9870a (patch)
tree84f21bd0bf7071bc5fc7dd989e77d7ceb5476682 /arch/mips/Kconfig
downloadohosKernel-a07bb8fd1299070229f0e8f3dcb57ffd5ef9870a.tar.gz
ohosKernel-a07bb8fd1299070229f0e8f3dcb57ffd5ef9870a.zip
Initial commit: OpenHarmony-v4.0-ReleaseOpenHarmony-v4.0-Release
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig3340
1 files changed, 3340 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
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1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3 bool
4 default y
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_FORTIFY_SOURCE
8 select ARCH_HAS_KCOV
9 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
10 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
11 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
12 select ARCH_HAS_UBSAN_SANITIZE_ALL
13 select ARCH_SUPPORTS_UPROBES
14 select ARCH_USE_BUILTIN_BSWAP
15 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
16 select ARCH_USE_QUEUED_RWLOCKS
17 select ARCH_USE_QUEUED_SPINLOCKS
18 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
19 select ARCH_WANT_IPC_PARSE_VERSION
20 select BUILDTIME_TABLE_SORT
21 select CLONE_BACKWARDS
22 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
23 select CPU_PM if CPU_IDLE
24 select GENERIC_ATOMIC64 if !64BIT
25 select GENERIC_CLOCKEVENTS
26 select GENERIC_CMOS_UPDATE
27 select GENERIC_CPU_AUTOPROBE
28 select GENERIC_GETTIMEOFDAY
29 select GENERIC_IOMAP
30 select GENERIC_IRQ_PROBE
31 select GENERIC_IRQ_SHOW
32 select GENERIC_ISA_DMA if EISA
33 select GENERIC_LIB_ASHLDI3
34 select GENERIC_LIB_ASHRDI3
35 select GENERIC_LIB_CMPDI2
36 select GENERIC_LIB_LSHRDI3
37 select GENERIC_LIB_UCMPDI2
38 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
39 select GENERIC_SMP_IDLE_THREAD
40 select GENERIC_TIME_VSYSCALL
41 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
42 select HANDLE_DOMAIN_IRQ
43 select HAVE_ARCH_COMPILER_H
44 select HAVE_ARCH_JUMP_LABEL
45 select HAVE_ARCH_KGDB
46 select HAVE_ARCH_MMAP_RND_BITS if MMU
47 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
48 select HAVE_ARCH_SECCOMP_FILTER
49 select HAVE_ARCH_TRACEHOOK
50 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
51 select HAVE_ASM_MODVERSIONS
52 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
53 select HAVE_CONTEXT_TRACKING
54 select HAVE_TIF_NOHZ
55 select HAVE_C_RECORDMCOUNT
56 select HAVE_DEBUG_KMEMLEAK
57 select HAVE_DEBUG_STACKOVERFLOW
58 select HAVE_DMA_CONTIGUOUS
59 select HAVE_DYNAMIC_FTRACE
60 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
61 select HAVE_EXIT_THREAD
62 select HAVE_FAST_GUP
63 select HAVE_FTRACE_MCOUNT_RECORD
64 select HAVE_FUNCTION_GRAPH_TRACER
65 select HAVE_FUNCTION_TRACER
66 select HAVE_GCC_PLUGINS
67 select HAVE_GENERIC_VDSO
68 select HAVE_IDE
69 select HAVE_IOREMAP_PROT
70 select HAVE_IRQ_EXIT_ON_IRQ_STACK
71 select HAVE_IRQ_TIME_ACCOUNTING
72 select HAVE_KPROBES
73 select HAVE_KRETPROBES
74 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
75 select HAVE_MOD_ARCH_SPECIFIC
76 select HAVE_NMI
77 select HAVE_OPROFILE
78 select HAVE_PERF_EVENTS
79 select HAVE_REGS_AND_STACK_ACCESS_API
80 select HAVE_RSEQ
81 select HAVE_SPARSE_SYSCALL_NR
82 select HAVE_STACKPROTECTOR
83 select HAVE_SYSCALL_TRACEPOINTS
84 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
85 select IRQ_FORCED_THREADING
86 select ISA if EISA
87 select MODULES_USE_ELF_REL if MODULES
88 select MODULES_USE_ELF_RELA if MODULES && 64BIT
89 select PERF_USE_VMALLOC
90 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
91 select RTC_LIB
92 select SET_FS
93 select SYSCTL_EXCEPTION_TRACE
94 select VIRT_TO_BUS
95
96config MIPS_FIXUP_BIGPHYS_ADDR
97 bool
98
99config MIPS_GENERIC
100 bool
101
102config MACH_INGENIC
103 bool
104 select SYS_SUPPORTS_32BIT_KERNEL
105 select SYS_SUPPORTS_LITTLE_ENDIAN
106 select SYS_SUPPORTS_ZBOOT
107 select DMA_NONCOHERENT
108 select IRQ_MIPS_CPU
109 select PINCTRL
110 select GPIOLIB
111 select COMMON_CLK
112 select GENERIC_IRQ_CHIP
113 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
114 select USE_OF
115 select CPU_SUPPORTS_CPUFREQ
116 select MIPS_EXTERNAL_TIMER
117
118menu "Machine selection"
119
120choice
121 prompt "System type"
122 default MIPS_GENERIC_KERNEL
123
124config MIPS_GENERIC_KERNEL
125 bool "Generic board-agnostic MIPS kernel"
126 select MIPS_GENERIC
127 select BOOT_RAW
128 select BUILTIN_DTB
129 select CEVT_R4K
130 select CLKSRC_MIPS_GIC
131 select COMMON_CLK
132 select CPU_MIPSR2_IRQ_EI
133 select CPU_MIPSR2_IRQ_VI
134 select CSRC_R4K
135 select DMA_PERDEV_COHERENT
136 select HAVE_PCI
137 select IRQ_MIPS_CPU
138 select MIPS_AUTO_PFN_OFFSET
139 select MIPS_CPU_SCACHE
140 select MIPS_GIC
141 select MIPS_L1_CACHE_SHIFT_7
142 select NO_EXCEPT_FILL
143 select PCI_DRIVERS_GENERIC
144 select SMP_UP if SMP
145 select SWAP_IO_SPACE
146 select SYS_HAS_CPU_MIPS32_R1
147 select SYS_HAS_CPU_MIPS32_R2
148 select SYS_HAS_CPU_MIPS32_R6
149 select SYS_HAS_CPU_MIPS64_R1
150 select SYS_HAS_CPU_MIPS64_R2
151 select SYS_HAS_CPU_MIPS64_R6
152 select SYS_SUPPORTS_32BIT_KERNEL
153 select SYS_SUPPORTS_64BIT_KERNEL
154 select SYS_SUPPORTS_BIG_ENDIAN
155 select SYS_SUPPORTS_HIGHMEM
156 select SYS_SUPPORTS_LITTLE_ENDIAN
157 select SYS_SUPPORTS_MICROMIPS
158 select SYS_SUPPORTS_MIPS16
159 select SYS_SUPPORTS_MIPS_CPS
160 select SYS_SUPPORTS_MULTITHREADING
161 select SYS_SUPPORTS_RELOCATABLE
162 select SYS_SUPPORTS_SMARTMIPS
163 select SYS_SUPPORTS_ZBOOT
164 select UHI_BOOT
165 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
166 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
167 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
168 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
169 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
170 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
171 select USE_OF
172 help
173 Select this to build a kernel which aims to support multiple boards,
174 generally using a flattened device tree passed from the bootloader
175 using the boot protocol defined in the UHI (Unified Hosting
176 Interface) specification.
177
178config MIPS_ALCHEMY
179 bool "Alchemy processor based machines"
180 select PHYS_ADDR_T_64BIT
181 select CEVT_R4K
182 select CSRC_R4K
183 select IRQ_MIPS_CPU
184 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
185 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
186 select SYS_HAS_CPU_MIPS32_R1
187 select SYS_SUPPORTS_32BIT_KERNEL
188 select SYS_SUPPORTS_APM_EMULATION
189 select GPIOLIB
190 select SYS_SUPPORTS_ZBOOT
191 select COMMON_CLK
192
193config AR7
194 bool "Texas Instruments AR7"
195 select BOOT_ELF32
196 select DMA_NONCOHERENT
197 select CEVT_R4K
198 select CSRC_R4K
199 select IRQ_MIPS_CPU
200 select NO_EXCEPT_FILL
201 select SWAP_IO_SPACE
202 select SYS_HAS_CPU_MIPS32_R1
203 select SYS_HAS_EARLY_PRINTK
204 select SYS_SUPPORTS_32BIT_KERNEL
205 select SYS_SUPPORTS_LITTLE_ENDIAN
206 select SYS_SUPPORTS_MIPS16
207 select SYS_SUPPORTS_ZBOOT_UART16550
208 select GPIOLIB
209 select VLYNQ
210 select HAVE_LEGACY_CLK
211 help
212 Support for the Texas Instruments AR7 System-on-a-Chip
213 family: TNETD7100, 7200 and 7300.
214
215config ATH25
216 bool "Atheros AR231x/AR531x SoC support"
217 select CEVT_R4K
218 select CSRC_R4K
219 select DMA_NONCOHERENT
220 select IRQ_MIPS_CPU
221 select IRQ_DOMAIN
222 select SYS_HAS_CPU_MIPS32_R1
223 select SYS_SUPPORTS_BIG_ENDIAN
224 select SYS_SUPPORTS_32BIT_KERNEL
225 select SYS_HAS_EARLY_PRINTK
226 help
227 Support for Atheros AR231x and Atheros AR531x based boards
228
229config ATH79
230 bool "Atheros AR71XX/AR724X/AR913X based boards"
231 select ARCH_HAS_RESET_CONTROLLER
232 select BOOT_RAW
233 select CEVT_R4K
234 select CSRC_R4K
235 select DMA_NONCOHERENT
236 select GPIOLIB
237 select PINCTRL
238 select COMMON_CLK
239 select IRQ_MIPS_CPU
240 select SYS_HAS_CPU_MIPS32_R2
241 select SYS_HAS_EARLY_PRINTK
242 select SYS_SUPPORTS_32BIT_KERNEL
243 select SYS_SUPPORTS_BIG_ENDIAN
244 select SYS_SUPPORTS_MIPS16
245 select SYS_SUPPORTS_ZBOOT_UART_PROM
246 select USE_OF
247 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
248 help
249 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
250
251config BMIPS_GENERIC
252 bool "Broadcom Generic BMIPS kernel"
253 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
254 select ARCH_HAS_PHYS_TO_DMA
255 select BOOT_RAW
256 select NO_EXCEPT_FILL
257 select USE_OF
258 select CEVT_R4K
259 select CSRC_R4K
260 select SYNC_R4K
261 select COMMON_CLK
262 select BCM6345_L1_IRQ
263 select BCM7038_L1_IRQ
264 select BCM7120_L2_IRQ
265 select BRCMSTB_L2_IRQ
266 select IRQ_MIPS_CPU
267 select DMA_NONCOHERENT
268 select SYS_SUPPORTS_32BIT_KERNEL
269 select SYS_SUPPORTS_LITTLE_ENDIAN
270 select SYS_SUPPORTS_BIG_ENDIAN
271 select SYS_SUPPORTS_HIGHMEM
272 select SYS_HAS_CPU_BMIPS32_3300
273 select SYS_HAS_CPU_BMIPS4350
274 select SYS_HAS_CPU_BMIPS4380
275 select SYS_HAS_CPU_BMIPS5000
276 select SWAP_IO_SPACE
277 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
278 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
279 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
280 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
281 select HARDIRQS_SW_RESEND
282 help
283 Build a generic DT-based kernel image that boots on select
284 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
285 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
286 must be set appropriately for your board.
287
288config BCM47XX
289 bool "Broadcom BCM47XX based boards"
290 select BOOT_RAW
291 select CEVT_R4K
292 select CSRC_R4K
293 select DMA_NONCOHERENT
294 select HAVE_PCI
295 select IRQ_MIPS_CPU
296 select SYS_HAS_CPU_MIPS32_R1
297 select NO_EXCEPT_FILL
298 select SYS_SUPPORTS_32BIT_KERNEL
299 select SYS_SUPPORTS_LITTLE_ENDIAN
300 select SYS_SUPPORTS_MIPS16
301 select SYS_SUPPORTS_ZBOOT
302 select SYS_HAS_EARLY_PRINTK
303 select USE_GENERIC_EARLY_PRINTK_8250
304 select GPIOLIB
305 select LEDS_GPIO_REGISTER
306 select BCM47XX_NVRAM
307 select BCM47XX_SPROM
308 select BCM47XX_SSB if !BCM47XX_BCMA
309 help
310 Support for BCM47XX based boards
311
312config BCM63XX
313 bool "Broadcom BCM63XX based boards"
314 select BOOT_RAW
315 select CEVT_R4K
316 select CSRC_R4K
317 select SYNC_R4K
318 select DMA_NONCOHERENT
319 select IRQ_MIPS_CPU
320 select SYS_SUPPORTS_32BIT_KERNEL
321 select SYS_SUPPORTS_BIG_ENDIAN
322 select SYS_HAS_EARLY_PRINTK
323 select SYS_HAS_CPU_BMIPS32_3300
324 select SYS_HAS_CPU_BMIPS4350
325 select SYS_HAS_CPU_BMIPS4380
326 select SWAP_IO_SPACE
327 select GPIOLIB
328 select MIPS_L1_CACHE_SHIFT_4
329 select CLKDEV_LOOKUP
330 select HAVE_LEGACY_CLK
331 help
332 Support for BCM63XX based boards
333
334config MIPS_COBALT
335 bool "Cobalt Server"
336 select CEVT_R4K
337 select CSRC_R4K
338 select CEVT_GT641XX
339 select DMA_NONCOHERENT
340 select FORCE_PCI
341 select I8253
342 select I8259
343 select IRQ_MIPS_CPU
344 select IRQ_GT641XX
345 select PCI_GT64XXX_PCI0
346 select SYS_HAS_CPU_NEVADA
347 select SYS_HAS_EARLY_PRINTK
348 select SYS_SUPPORTS_32BIT_KERNEL
349 select SYS_SUPPORTS_64BIT_KERNEL
350 select SYS_SUPPORTS_LITTLE_ENDIAN
351 select USE_GENERIC_EARLY_PRINTK_8250
352
353config MACH_DECSTATION
354 bool "DECstations"
355 select BOOT_ELF32
356 select CEVT_DS1287
357 select CEVT_R4K if CPU_R4X00
358 select CSRC_IOASIC
359 select CSRC_R4K if CPU_R4X00
360 select CPU_DADDI_WORKAROUNDS if 64BIT
361 select CPU_R4000_WORKAROUNDS if 64BIT
362 select CPU_R4400_WORKAROUNDS if 64BIT
363 select DMA_NONCOHERENT
364 select NO_IOPORT_MAP
365 select IRQ_MIPS_CPU
366 select SYS_HAS_CPU_R3000
367 select SYS_HAS_CPU_R4X00
368 select SYS_SUPPORTS_32BIT_KERNEL
369 select SYS_SUPPORTS_64BIT_KERNEL
370 select SYS_SUPPORTS_LITTLE_ENDIAN
371 select SYS_SUPPORTS_128HZ
372 select SYS_SUPPORTS_256HZ
373 select SYS_SUPPORTS_1024HZ
374 select MIPS_L1_CACHE_SHIFT_4
375 help
376 This enables support for DEC's MIPS based workstations. For details
377 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
378 DECstation porting pages on <http://decstation.unix-ag.org/>.
379
380 If you have one of the following DECstation Models you definitely
381 want to choose R4xx0 for the CPU Type:
382
383 DECstation 5000/50
384 DECstation 5000/150
385 DECstation 5000/260
386 DECsystem 5900/260
387
388 otherwise choose R3000.
389
390config MACH_JAZZ
391 bool "Jazz family of machines"
392 select ARC_MEMORY
393 select ARC_PROMLIB
394 select ARCH_MIGHT_HAVE_PC_PARPORT
395 select ARCH_MIGHT_HAVE_PC_SERIO
396 select DMA_OPS
397 select FW_ARC
398 select FW_ARC32
399 select ARCH_MAY_HAVE_PC_FDC
400 select CEVT_R4K
401 select CSRC_R4K
402 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
403 select GENERIC_ISA_DMA
404 select HAVE_PCSPKR_PLATFORM
405 select IRQ_MIPS_CPU
406 select I8253
407 select I8259
408 select ISA
409 select SYS_HAS_CPU_R4X00
410 select SYS_SUPPORTS_32BIT_KERNEL
411 select SYS_SUPPORTS_64BIT_KERNEL
412 select SYS_SUPPORTS_100HZ
413 help
414 This a family of machines based on the MIPS R4030 chipset which was
415 used by several vendors to build RISC/os and Windows NT workstations.
416 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
417 Olivetti M700-10 workstations.
418
419config MACH_INGENIC_SOC
420 bool "Ingenic SoC based machines"
421 select MIPS_GENERIC
422 select MACH_INGENIC
423 select SYS_SUPPORTS_ZBOOT_UART16550
424 select CPU_SUPPORTS_CPUFREQ
425 select MIPS_EXTERNAL_TIMER
426
427config LANTIQ
428 bool "Lantiq based platforms"
429 select DMA_NONCOHERENT
430 select IRQ_MIPS_CPU
431 select CEVT_R4K
432 select CSRC_R4K
433 select SYS_HAS_CPU_MIPS32_R1
434 select SYS_HAS_CPU_MIPS32_R2
435 select SYS_SUPPORTS_BIG_ENDIAN
436 select SYS_SUPPORTS_32BIT_KERNEL
437 select SYS_SUPPORTS_MIPS16
438 select SYS_SUPPORTS_MULTITHREADING
439 select SYS_SUPPORTS_VPE_LOADER
440 select SYS_HAS_EARLY_PRINTK
441 select GPIOLIB
442 select SWAP_IO_SPACE
443 select BOOT_RAW
444 select CLKDEV_LOOKUP
445 select HAVE_LEGACY_CLK
446 select USE_OF
447 select PINCTRL
448 select PINCTRL_LANTIQ
449 select ARCH_HAS_RESET_CONTROLLER
450 select RESET_CONTROLLER
451
452config MACH_LOONGSON32
453 bool "Loongson 32-bit family of machines"
454 select SYS_SUPPORTS_ZBOOT
455 help
456 This enables support for the Loongson-1 family of machines.
457
458 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
459 the Institute of Computing Technology (ICT), Chinese Academy of
460 Sciences (CAS).
461
462config MACH_LOONGSON2EF
463 bool "Loongson-2E/F family of machines"
464 select SYS_SUPPORTS_ZBOOT
465 help
466 This enables the support of early Loongson-2E/F family of machines.
467
468config MACH_LOONGSON64
469 bool "Loongson 64-bit family of machines"
470 select ARCH_SPARSEMEM_ENABLE
471 select ARCH_MIGHT_HAVE_PC_PARPORT
472 select ARCH_MIGHT_HAVE_PC_SERIO
473 select GENERIC_ISA_DMA_SUPPORT_BROKEN
474 select BOOT_ELF32
475 select BOARD_SCACHE
476 select CSRC_R4K
477 select CEVT_R4K
478 select CPU_HAS_WB
479 select FORCE_PCI
480 select ISA
481 select I8259
482 select IRQ_MIPS_CPU
483 select NO_EXCEPT_FILL
484 select NR_CPUS_DEFAULT_64
485 select USE_GENERIC_EARLY_PRINTK_8250
486 select PCI_DRIVERS_GENERIC
487 select SYS_HAS_CPU_LOONGSON64
488 select SYS_HAS_EARLY_PRINTK
489 select SYS_SUPPORTS_SMP
490 select SYS_SUPPORTS_HOTPLUG_CPU
491 select SYS_SUPPORTS_NUMA
492 select SYS_SUPPORTS_64BIT_KERNEL
493 select SYS_SUPPORTS_HIGHMEM
494 select SYS_SUPPORTS_LITTLE_ENDIAN
495 select SYS_SUPPORTS_ZBOOT
496 select ZONE_DMA32
497 select NUMA
498 select SMP
499 select COMMON_CLK
500 select USE_OF
501 select BUILTIN_DTB
502 select PCI_HOST_GENERIC
503 help
504 This enables the support of Loongson-2/3 family of machines.
505
506 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
507 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
508 and Loongson-2F which will be removed), developed by the Institute
509 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
510
511config MACH_PISTACHIO
512 bool "IMG Pistachio SoC based boards"
513 select BOOT_ELF32
514 select BOOT_RAW
515 select CEVT_R4K
516 select CLKSRC_MIPS_GIC
517 select COMMON_CLK
518 select CSRC_R4K
519 select DMA_NONCOHERENT
520 select GPIOLIB
521 select IRQ_MIPS_CPU
522 select MFD_SYSCON
523 select MIPS_CPU_SCACHE
524 select MIPS_GIC
525 select PINCTRL
526 select REGULATOR
527 select SYS_HAS_CPU_MIPS32_R2
528 select SYS_SUPPORTS_32BIT_KERNEL
529 select SYS_SUPPORTS_LITTLE_ENDIAN
530 select SYS_SUPPORTS_MIPS_CPS
531 select SYS_SUPPORTS_MULTITHREADING
532 select SYS_SUPPORTS_RELOCATABLE
533 select SYS_SUPPORTS_ZBOOT
534 select SYS_HAS_EARLY_PRINTK
535 select USE_GENERIC_EARLY_PRINTK_8250
536 select USE_OF
537 help
538 This enables support for the IMG Pistachio SoC platform.
539
540config MIPS_MALTA
541 bool "MIPS Malta board"
542 select ARCH_MAY_HAVE_PC_FDC
543 select ARCH_MIGHT_HAVE_PC_PARPORT
544 select ARCH_MIGHT_HAVE_PC_SERIO
545 select BOOT_ELF32
546 select BOOT_RAW
547 select BUILTIN_DTB
548 select CEVT_R4K
549 select CLKSRC_MIPS_GIC
550 select COMMON_CLK
551 select CSRC_R4K
552 select DMA_MAYBE_COHERENT
553 select GENERIC_ISA_DMA
554 select HAVE_PCSPKR_PLATFORM
555 select HAVE_PCI
556 select I8253
557 select I8259
558 select IRQ_MIPS_CPU
559 select MIPS_BONITO64
560 select MIPS_CPU_SCACHE
561 select MIPS_GIC
562 select MIPS_L1_CACHE_SHIFT_6
563 select MIPS_MSC
564 select PCI_GT64XXX_PCI0
565 select SMP_UP if SMP
566 select SWAP_IO_SPACE
567 select SYS_HAS_CPU_MIPS32_R1
568 select SYS_HAS_CPU_MIPS32_R2
569 select SYS_HAS_CPU_MIPS32_R3_5
570 select SYS_HAS_CPU_MIPS32_R5
571 select SYS_HAS_CPU_MIPS32_R6
572 select SYS_HAS_CPU_MIPS64_R1
573 select SYS_HAS_CPU_MIPS64_R2
574 select SYS_HAS_CPU_MIPS64_R6
575 select SYS_HAS_CPU_NEVADA
576 select SYS_HAS_CPU_RM7000
577 select SYS_SUPPORTS_32BIT_KERNEL
578 select SYS_SUPPORTS_64BIT_KERNEL
579 select SYS_SUPPORTS_BIG_ENDIAN
580 select SYS_SUPPORTS_HIGHMEM
581 select SYS_SUPPORTS_LITTLE_ENDIAN
582 select SYS_SUPPORTS_MICROMIPS
583 select SYS_SUPPORTS_MIPS16
584 select SYS_SUPPORTS_MIPS_CMP
585 select SYS_SUPPORTS_MIPS_CPS
586 select SYS_SUPPORTS_MULTITHREADING
587 select SYS_SUPPORTS_RELOCATABLE
588 select SYS_SUPPORTS_SMARTMIPS
589 select SYS_SUPPORTS_VPE_LOADER
590 select SYS_SUPPORTS_ZBOOT
591 select USE_OF
592 select WAR_ICACHE_REFILLS
593 select ZONE_DMA32 if 64BIT
594 help
595 This enables support for the MIPS Technologies Malta evaluation
596 board.
597
598config MACH_PIC32
599 bool "Microchip PIC32 Family"
600 help
601 This enables support for the Microchip PIC32 family of platforms.
602
603 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
604 microcontrollers.
605
606config MACH_VR41XX
607 bool "NEC VR4100 series based machines"
608 select CEVT_R4K
609 select CSRC_R4K
610 select SYS_HAS_CPU_VR41XX
611 select SYS_SUPPORTS_MIPS16
612 select GPIOLIB
613
614config RALINK
615 bool "Ralink based machines"
616 select CEVT_R4K
617 select CSRC_R4K
618 select BOOT_RAW
619 select DMA_NONCOHERENT
620 select IRQ_MIPS_CPU
621 select USE_OF
622 select SYS_HAS_CPU_MIPS32_R1
623 select SYS_HAS_CPU_MIPS32_R2
624 select SYS_SUPPORTS_32BIT_KERNEL
625 select SYS_SUPPORTS_LITTLE_ENDIAN
626 select SYS_SUPPORTS_MIPS16
627 select SYS_SUPPORTS_ZBOOT
628 select SYS_HAS_EARLY_PRINTK
629 select CLKDEV_LOOKUP
630 select ARCH_HAS_RESET_CONTROLLER
631 select RESET_CONTROLLER
632
633config SGI_IP22
634 bool "SGI IP22 (Indy/Indigo2)"
635 select ARC_MEMORY
636 select ARC_PROMLIB
637 select FW_ARC
638 select FW_ARC32
639 select ARCH_MIGHT_HAVE_PC_SERIO
640 select BOOT_ELF32
641 select CEVT_R4K
642 select CSRC_R4K
643 select DEFAULT_SGI_PARTITION
644 select DMA_NONCOHERENT
645 select HAVE_EISA
646 select I8253
647 select I8259
648 select IP22_CPU_SCACHE
649 select IRQ_MIPS_CPU
650 select GENERIC_ISA_DMA_SUPPORT_BROKEN
651 select SGI_HAS_I8042
652 select SGI_HAS_INDYDOG
653 select SGI_HAS_HAL2
654 select SGI_HAS_SEEQ
655 select SGI_HAS_WD93
656 select SGI_HAS_ZILOG
657 select SWAP_IO_SPACE
658 select SYS_HAS_CPU_R4X00
659 select SYS_HAS_CPU_R5000
660 select SYS_HAS_EARLY_PRINTK
661 select SYS_SUPPORTS_32BIT_KERNEL
662 select SYS_SUPPORTS_64BIT_KERNEL
663 select SYS_SUPPORTS_BIG_ENDIAN
664 select WAR_R4600_V1_INDEX_ICACHEOP
665 select WAR_R4600_V1_HIT_CACHEOP
666 select WAR_R4600_V2_HIT_CACHEOP
667 select MIPS_L1_CACHE_SHIFT_7
668 help
669 This are the SGI Indy, Challenge S and Indigo2, as well as certain
670 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
671 that runs on these, say Y here.
672
673config SGI_IP27
674 bool "SGI IP27 (Origin200/2000)"
675 select ARCH_HAS_PHYS_TO_DMA
676 select ARCH_SPARSEMEM_ENABLE
677 select FW_ARC
678 select FW_ARC64
679 select ARC_CMDLINE_ONLY
680 select BOOT_ELF64
681 select DEFAULT_SGI_PARTITION
682 select SYS_HAS_EARLY_PRINTK
683 select HAVE_PCI
684 select IRQ_MIPS_CPU
685 select IRQ_DOMAIN_HIERARCHY
686 select NR_CPUS_DEFAULT_64
687 select PCI_DRIVERS_GENERIC
688 select PCI_XTALK_BRIDGE
689 select SYS_HAS_CPU_R10000
690 select SYS_SUPPORTS_64BIT_KERNEL
691 select SYS_SUPPORTS_BIG_ENDIAN
692 select SYS_SUPPORTS_NUMA
693 select SYS_SUPPORTS_SMP
694 select WAR_R10000_LLSC
695 select MIPS_L1_CACHE_SHIFT_7
696 select NUMA
697 help
698 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
699 workstations. To compile a Linux kernel that runs on these, say Y
700 here.
701
702config SGI_IP28
703 bool "SGI IP28 (Indigo2 R10k)"
704 select ARC_MEMORY
705 select ARC_PROMLIB
706 select FW_ARC
707 select FW_ARC64
708 select ARCH_MIGHT_HAVE_PC_SERIO
709 select BOOT_ELF64
710 select CEVT_R4K
711 select CSRC_R4K
712 select DEFAULT_SGI_PARTITION
713 select DMA_NONCOHERENT
714 select GENERIC_ISA_DMA_SUPPORT_BROKEN
715 select IRQ_MIPS_CPU
716 select HAVE_EISA
717 select I8253
718 select I8259
719 select SGI_HAS_I8042
720 select SGI_HAS_INDYDOG
721 select SGI_HAS_HAL2
722 select SGI_HAS_SEEQ
723 select SGI_HAS_WD93
724 select SGI_HAS_ZILOG
725 select SWAP_IO_SPACE
726 select SYS_HAS_CPU_R10000
727 select SYS_HAS_EARLY_PRINTK
728 select SYS_SUPPORTS_64BIT_KERNEL
729 select SYS_SUPPORTS_BIG_ENDIAN
730 select WAR_R10000_LLSC
731 select MIPS_L1_CACHE_SHIFT_7
732 help
733 This is the SGI Indigo2 with R10000 processor. To compile a Linux
734 kernel that runs on these, say Y here.
735
736config SGI_IP30
737 bool "SGI IP30 (Octane/Octane2)"
738 select ARCH_HAS_PHYS_TO_DMA
739 select FW_ARC
740 select FW_ARC64
741 select BOOT_ELF64
742 select CEVT_R4K
743 select CSRC_R4K
744 select SYNC_R4K if SMP
745 select ZONE_DMA32
746 select HAVE_PCI
747 select IRQ_MIPS_CPU
748 select IRQ_DOMAIN_HIERARCHY
749 select NR_CPUS_DEFAULT_2
750 select PCI_DRIVERS_GENERIC
751 select PCI_XTALK_BRIDGE
752 select SYS_HAS_EARLY_PRINTK
753 select SYS_HAS_CPU_R10000
754 select SYS_SUPPORTS_64BIT_KERNEL
755 select SYS_SUPPORTS_BIG_ENDIAN
756 select SYS_SUPPORTS_SMP
757 select WAR_R10000_LLSC
758 select MIPS_L1_CACHE_SHIFT_7
759 select ARC_MEMORY
760 help
761 These are the SGI Octane and Octane2 graphics workstations. To
762 compile a Linux kernel that runs on these, say Y here.
763
764config SGI_IP32
765 bool "SGI IP32 (O2)"
766 select ARC_MEMORY
767 select ARC_PROMLIB
768 select ARCH_HAS_PHYS_TO_DMA
769 select FW_ARC
770 select FW_ARC32
771 select BOOT_ELF32
772 select CEVT_R4K
773 select CSRC_R4K
774 select DMA_NONCOHERENT
775 select HAVE_PCI
776 select IRQ_MIPS_CPU
777 select R5000_CPU_SCACHE
778 select RM7000_CPU_SCACHE
779 select SYS_HAS_CPU_R5000
780 select SYS_HAS_CPU_R10000 if BROKEN
781 select SYS_HAS_CPU_RM7000
782 select SYS_HAS_CPU_NEVADA
783 select SYS_SUPPORTS_64BIT_KERNEL
784 select SYS_SUPPORTS_BIG_ENDIAN
785 select WAR_ICACHE_REFILLS
786 help
787 If you want this kernel to run on SGI O2 workstation, say Y here.
788
789config SIBYTE_CRHINE
790 bool "Sibyte BCM91120C-CRhine"
791 select BOOT_ELF32
792 select SIBYTE_BCM1120
793 select SWAP_IO_SPACE
794 select SYS_HAS_CPU_SB1
795 select SYS_SUPPORTS_BIG_ENDIAN
796 select SYS_SUPPORTS_LITTLE_ENDIAN
797
798config SIBYTE_CARMEL
799 bool "Sibyte BCM91120x-Carmel"
800 select BOOT_ELF32
801 select SIBYTE_BCM1120
802 select SWAP_IO_SPACE
803 select SYS_HAS_CPU_SB1
804 select SYS_SUPPORTS_BIG_ENDIAN
805 select SYS_SUPPORTS_LITTLE_ENDIAN
806
807config SIBYTE_CRHONE
808 bool "Sibyte BCM91125C-CRhone"
809 select BOOT_ELF32
810 select SIBYTE_BCM1125
811 select SWAP_IO_SPACE
812 select SYS_HAS_CPU_SB1
813 select SYS_SUPPORTS_BIG_ENDIAN
814 select SYS_SUPPORTS_HIGHMEM
815 select SYS_SUPPORTS_LITTLE_ENDIAN
816
817config SIBYTE_RHONE
818 bool "Sibyte BCM91125E-Rhone"
819 select BOOT_ELF32
820 select SIBYTE_BCM1125H
821 select SWAP_IO_SPACE
822 select SYS_HAS_CPU_SB1
823 select SYS_SUPPORTS_BIG_ENDIAN
824 select SYS_SUPPORTS_LITTLE_ENDIAN
825
826config SIBYTE_SWARM
827 bool "Sibyte BCM91250A-SWARM"
828 select BOOT_ELF32
829 select HAVE_PATA_PLATFORM
830 select SIBYTE_SB1250
831 select SWAP_IO_SPACE
832 select SYS_HAS_CPU_SB1
833 select SYS_SUPPORTS_BIG_ENDIAN
834 select SYS_SUPPORTS_HIGHMEM
835 select SYS_SUPPORTS_LITTLE_ENDIAN
836 select ZONE_DMA32 if 64BIT
837 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
838
839config SIBYTE_LITTLESUR
840 bool "Sibyte BCM91250C2-LittleSur"
841 select BOOT_ELF32
842 select HAVE_PATA_PLATFORM
843 select SIBYTE_SB1250
844 select SWAP_IO_SPACE
845 select SYS_HAS_CPU_SB1
846 select SYS_SUPPORTS_BIG_ENDIAN
847 select SYS_SUPPORTS_HIGHMEM
848 select SYS_SUPPORTS_LITTLE_ENDIAN
849 select ZONE_DMA32 if 64BIT
850
851config SIBYTE_SENTOSA
852 bool "Sibyte BCM91250E-Sentosa"
853 select BOOT_ELF32
854 select SIBYTE_SB1250
855 select SWAP_IO_SPACE
856 select SYS_HAS_CPU_SB1
857 select SYS_SUPPORTS_BIG_ENDIAN
858 select SYS_SUPPORTS_LITTLE_ENDIAN
859 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
860
861config SIBYTE_BIGSUR
862 bool "Sibyte BCM91480B-BigSur"
863 select BOOT_ELF32
864 select NR_CPUS_DEFAULT_4
865 select SIBYTE_BCM1x80
866 select SWAP_IO_SPACE
867 select SYS_HAS_CPU_SB1
868 select SYS_SUPPORTS_BIG_ENDIAN
869 select SYS_SUPPORTS_HIGHMEM
870 select SYS_SUPPORTS_LITTLE_ENDIAN
871 select ZONE_DMA32 if 64BIT
872 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
873
874config SNI_RM
875 bool "SNI RM200/300/400"
876 select ARC_MEMORY
877 select ARC_PROMLIB
878 select FW_ARC if CPU_LITTLE_ENDIAN
879 select FW_ARC32 if CPU_LITTLE_ENDIAN
880 select FW_SNIPROM if CPU_BIG_ENDIAN
881 select ARCH_MAY_HAVE_PC_FDC
882 select ARCH_MIGHT_HAVE_PC_PARPORT
883 select ARCH_MIGHT_HAVE_PC_SERIO
884 select BOOT_ELF32
885 select CEVT_R4K
886 select CSRC_R4K
887 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
888 select DMA_NONCOHERENT
889 select GENERIC_ISA_DMA
890 select HAVE_EISA
891 select HAVE_PCSPKR_PLATFORM
892 select HAVE_PCI
893 select IRQ_MIPS_CPU
894 select I8253
895 select I8259
896 select ISA
897 select MIPS_L1_CACHE_SHIFT_6
898 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
899 select SYS_HAS_CPU_R4X00
900 select SYS_HAS_CPU_R5000
901 select SYS_HAS_CPU_R10000
902 select R5000_CPU_SCACHE
903 select SYS_HAS_EARLY_PRINTK
904 select SYS_SUPPORTS_32BIT_KERNEL
905 select SYS_SUPPORTS_64BIT_KERNEL
906 select SYS_SUPPORTS_BIG_ENDIAN
907 select SYS_SUPPORTS_HIGHMEM
908 select SYS_SUPPORTS_LITTLE_ENDIAN
909 select WAR_R4600_V2_HIT_CACHEOP
910 help
911 The SNI RM200/300/400 are MIPS-based machines manufactured by
912 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
913 Technology and now in turn merged with Fujitsu. Say Y here to
914 support this machine type.
915
916config MACH_TX39XX
917 bool "Toshiba TX39 series based machines"
918
919config MACH_TX49XX
920 bool "Toshiba TX49 series based machines"
921 select WAR_TX49XX_ICACHE_INDEX_INV
922
923config MIKROTIK_RB532
924 bool "Mikrotik RB532 boards"
925 select CEVT_R4K
926 select CSRC_R4K
927 select DMA_NONCOHERENT
928 select HAVE_PCI
929 select IRQ_MIPS_CPU
930 select SYS_HAS_CPU_MIPS32_R1
931 select SYS_SUPPORTS_32BIT_KERNEL
932 select SYS_SUPPORTS_LITTLE_ENDIAN
933 select SWAP_IO_SPACE
934 select BOOT_RAW
935 select GPIOLIB
936 select MIPS_L1_CACHE_SHIFT_4
937 help
938 Support the Mikrotik(tm) RouterBoard 532 series,
939 based on the IDT RC32434 SoC.
940
941config CAVIUM_OCTEON_SOC
942 bool "Cavium Networks Octeon SoC based boards"
943 select CEVT_R4K
944 select ARCH_HAS_PHYS_TO_DMA
945 select HAVE_RAPIDIO
946 select PHYS_ADDR_T_64BIT
947 select SYS_SUPPORTS_64BIT_KERNEL
948 select SYS_SUPPORTS_BIG_ENDIAN
949 select EDAC_SUPPORT
950 select EDAC_ATOMIC_SCRUB
951 select SYS_SUPPORTS_LITTLE_ENDIAN
952 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
953 select SYS_HAS_EARLY_PRINTK
954 select SYS_HAS_CPU_CAVIUM_OCTEON
955 select HAVE_PCI
956 select HAVE_PLAT_DELAY
957 select HAVE_PLAT_FW_INIT_CMDLINE
958 select HAVE_PLAT_MEMCPY
959 select ZONE_DMA32
960 select HOLES_IN_ZONE
961 select GPIOLIB
962 select USE_OF
963 select ARCH_SPARSEMEM_ENABLE
964 select SYS_SUPPORTS_SMP
965 select NR_CPUS_DEFAULT_64
966 select MIPS_NR_CPU_NR_MAP_1024
967 select BUILTIN_DTB
968 select MTD_COMPLEX_MAPPINGS
969 select SWIOTLB
970 select SYS_SUPPORTS_RELOCATABLE
971 help
972 This option supports all of the Octeon reference boards from Cavium
973 Networks. It builds a kernel that dynamically determines the Octeon
974 CPU type and supports all known board reference implementations.
975 Some of the supported boards are:
976 EBT3000
977 EBH3000
978 EBH3100
979 Thunder
980 Kodama
981 Hikari
982 Say Y here for most Octeon reference boards.
983
984config NLM_XLR_BOARD
985 bool "Netlogic XLR/XLS based systems"
986 select BOOT_ELF32
987 select NLM_COMMON
988 select SYS_HAS_CPU_XLR
989 select SYS_SUPPORTS_SMP
990 select HAVE_PCI
991 select SWAP_IO_SPACE
992 select SYS_SUPPORTS_32BIT_KERNEL
993 select SYS_SUPPORTS_64BIT_KERNEL
994 select PHYS_ADDR_T_64BIT
995 select SYS_SUPPORTS_BIG_ENDIAN
996 select SYS_SUPPORTS_HIGHMEM
997 select NR_CPUS_DEFAULT_32
998 select CEVT_R4K
999 select CSRC_R4K
1000 select IRQ_MIPS_CPU
1001 select ZONE_DMA32 if 64BIT
1002 select SYNC_R4K
1003 select SYS_HAS_EARLY_PRINTK
1004 select SYS_SUPPORTS_ZBOOT
1005 select SYS_SUPPORTS_ZBOOT_UART16550
1006 help
1007 Support for systems based on Netlogic XLR and XLS processors.
1008 Say Y here if you have a XLR or XLS based board.
1009
1010config NLM_XLP_BOARD
1011 bool "Netlogic XLP based systems"
1012 select BOOT_ELF32
1013 select NLM_COMMON
1014 select SYS_HAS_CPU_XLP
1015 select SYS_SUPPORTS_SMP
1016 select HAVE_PCI
1017 select SYS_SUPPORTS_32BIT_KERNEL
1018 select SYS_SUPPORTS_64BIT_KERNEL
1019 select PHYS_ADDR_T_64BIT
1020 select GPIOLIB
1021 select SYS_SUPPORTS_BIG_ENDIAN
1022 select SYS_SUPPORTS_LITTLE_ENDIAN
1023 select SYS_SUPPORTS_HIGHMEM
1024 select NR_CPUS_DEFAULT_32
1025 select CEVT_R4K
1026 select CSRC_R4K
1027 select IRQ_MIPS_CPU
1028 select ZONE_DMA32 if 64BIT
1029 select SYNC_R4K
1030 select SYS_HAS_EARLY_PRINTK
1031 select USE_OF
1032 select SYS_SUPPORTS_ZBOOT
1033 select SYS_SUPPORTS_ZBOOT_UART16550
1034 help
1035 This board is based on Netlogic XLP Processor.
1036 Say Y here if you have a XLP based board.
1037
1038endchoice
1039
1040source "arch/mips/alchemy/Kconfig"
1041source "arch/mips/ath25/Kconfig"
1042source "arch/mips/ath79/Kconfig"
1043source "arch/mips/bcm47xx/Kconfig"
1044source "arch/mips/bcm63xx/Kconfig"
1045source "arch/mips/bmips/Kconfig"
1046source "arch/mips/generic/Kconfig"
1047source "arch/mips/ingenic/Kconfig"
1048source "arch/mips/jazz/Kconfig"
1049source "arch/mips/lantiq/Kconfig"
1050source "arch/mips/pic32/Kconfig"
1051source "arch/mips/pistachio/Kconfig"
1052source "arch/mips/ralink/Kconfig"
1053source "arch/mips/sgi-ip27/Kconfig"
1054source "arch/mips/sibyte/Kconfig"
1055source "arch/mips/txx9/Kconfig"
1056source "arch/mips/vr41xx/Kconfig"
1057source "arch/mips/cavium-octeon/Kconfig"
1058source "arch/mips/loongson2ef/Kconfig"
1059source "arch/mips/loongson32/Kconfig"
1060source "arch/mips/loongson64/Kconfig"
1061source "arch/mips/netlogic/Kconfig"
1062
1063endmenu
1064
1065config GENERIC_HWEIGHT
1066 bool
1067 default y
1068
1069config GENERIC_CALIBRATE_DELAY
1070 bool
1071 default y
1072
1073config SCHED_OMIT_FRAME_POINTER
1074 bool
1075 default y
1076
1077#
1078# Select some configuration options automatically based on user selections.
1079#
1080config FW_ARC
1081 bool
1082
1083config ARCH_MAY_HAVE_PC_FDC
1084 bool
1085
1086config BOOT_RAW
1087 bool
1088
1089config CEVT_BCM1480
1090 bool
1091
1092config CEVT_DS1287
1093 bool
1094
1095config CEVT_GT641XX
1096 bool
1097
1098config CEVT_R4K
1099 bool
1100
1101config CEVT_SB1250
1102 bool
1103
1104config CEVT_TXX9
1105 bool
1106
1107config CSRC_BCM1480
1108 bool
1109
1110config CSRC_IOASIC
1111 bool
1112
1113config CSRC_R4K
1114 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1115 bool
1116
1117config CSRC_SB1250
1118 bool
1119
1120config MIPS_CLOCK_VSYSCALL
1121 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1122
1123config GPIO_TXX9
1124 select GPIOLIB
1125 bool
1126
1127config FW_CFE
1128 bool
1129
1130config ARCH_SUPPORTS_UPROBES
1131 bool
1132
1133config DMA_MAYBE_COHERENT
1134 select ARCH_HAS_DMA_COHERENCE_H
1135 select DMA_NONCOHERENT
1136 bool
1137
1138config DMA_PERDEV_COHERENT
1139 bool
1140 select ARCH_HAS_SETUP_DMA_OPS
1141 select DMA_NONCOHERENT
1142
1143config DMA_NONCOHERENT
1144 bool
1145 #
1146 # MIPS allows mixing "slightly different" Cacheability and Coherency
1147 # Attribute bits. It is believed that the uncached access through
1148 # KSEG1 and the implementation specific "uncached accelerated" used
1149 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1150 # significant advantages.
1151 #
1152 select ARCH_HAS_DMA_WRITE_COMBINE
1153 select ARCH_HAS_DMA_PREP_COHERENT
1154 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1155 select ARCH_HAS_DMA_SET_UNCACHED
1156 select DMA_NONCOHERENT_MMAP
1157 select NEED_DMA_MAP_STATE
1158
1159config SYS_HAS_EARLY_PRINTK
1160 bool
1161
1162config SYS_SUPPORTS_HOTPLUG_CPU
1163 bool
1164
1165config MIPS_BONITO64
1166 bool
1167
1168config MIPS_MSC
1169 bool
1170
1171config SYNC_R4K
1172 bool
1173
1174config NO_IOPORT_MAP
1175 def_bool n
1176
1177config GENERIC_CSUM
1178 def_bool CPU_NO_LOAD_STORE_LR
1179
1180config GENERIC_ISA_DMA
1181 bool
1182 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1183 select ISA_DMA_API
1184
1185config GENERIC_ISA_DMA_SUPPORT_BROKEN
1186 bool
1187 select GENERIC_ISA_DMA
1188
1189config HAVE_PLAT_DELAY
1190 bool
1191
1192config HAVE_PLAT_FW_INIT_CMDLINE
1193 bool
1194
1195config HAVE_PLAT_MEMCPY
1196 bool
1197
1198config ISA_DMA_API
1199 bool
1200
1201config SYS_SUPPORTS_RELOCATABLE
1202 bool
1203 help
1204 Selected if the platform supports relocating the kernel.
1205 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1206 to allow access to command line and entropy sources.
1207
1208config MIPS_CBPF_JIT
1209 def_bool y
1210 depends on BPF_JIT && HAVE_CBPF_JIT
1211
1212config MIPS_EBPF_JIT
1213 def_bool y
1214 depends on BPF_JIT && HAVE_EBPF_JIT
1215
1216
1217#
1218# Endianness selection. Sufficiently obscure so many users don't know what to
1219# answer,so we try hard to limit the available choices. Also the use of a
1220# choice statement should be more obvious to the user.
1221#
1222choice
1223 prompt "Endianness selection"
1224 help
1225 Some MIPS machines can be configured for either little or big endian
1226 byte order. These modes require different kernels and a different
1227 Linux distribution. In general there is one preferred byteorder for a
1228 particular system but some systems are just as commonly used in the
1229 one or the other endianness.
1230
1231config CPU_BIG_ENDIAN
1232 bool "Big endian"
1233 depends on SYS_SUPPORTS_BIG_ENDIAN
1234
1235config CPU_LITTLE_ENDIAN
1236 bool "Little endian"
1237 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1238
1239endchoice
1240
1241config EXPORT_UASM
1242 bool
1243
1244config SYS_SUPPORTS_APM_EMULATION
1245 bool
1246
1247config SYS_SUPPORTS_BIG_ENDIAN
1248 bool
1249
1250config SYS_SUPPORTS_LITTLE_ENDIAN
1251 bool
1252
1253config SYS_SUPPORTS_HUGETLBFS
1254 bool
1255 depends on CPU_SUPPORTS_HUGEPAGES
1256 default y
1257
1258config MIPS_HUGE_TLB_SUPPORT
1259 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1260
1261config IRQ_CPU_RM7K
1262 bool
1263
1264config IRQ_MSP_SLP
1265 bool
1266
1267config IRQ_MSP_CIC
1268 bool
1269
1270config IRQ_TXX9
1271 bool
1272
1273config IRQ_GT641XX
1274 bool
1275
1276config PCI_GT64XXX_PCI0
1277 bool
1278
1279config PCI_XTALK_BRIDGE
1280 bool
1281
1282config NO_EXCEPT_FILL
1283 bool
1284
1285config MIPS_SPRAM
1286 bool
1287
1288config SWAP_IO_SPACE
1289 bool
1290
1291config SGI_HAS_INDYDOG
1292 bool
1293
1294config SGI_HAS_HAL2
1295 bool
1296
1297config SGI_HAS_SEEQ
1298 bool
1299
1300config SGI_HAS_WD93
1301 bool
1302
1303config SGI_HAS_ZILOG
1304 bool
1305
1306config SGI_HAS_I8042
1307 bool
1308
1309config DEFAULT_SGI_PARTITION
1310 bool
1311
1312config FW_ARC32
1313 bool
1314
1315config FW_SNIPROM
1316 bool
1317
1318config BOOT_ELF32
1319 bool
1320
1321config MIPS_L1_CACHE_SHIFT_4
1322 bool
1323
1324config MIPS_L1_CACHE_SHIFT_5
1325 bool
1326
1327config MIPS_L1_CACHE_SHIFT_6
1328 bool
1329
1330config MIPS_L1_CACHE_SHIFT_7
1331 bool
1332
1333config MIPS_L1_CACHE_SHIFT
1334 int
1335 default "7" if MIPS_L1_CACHE_SHIFT_7
1336 default "6" if MIPS_L1_CACHE_SHIFT_6
1337 default "5" if MIPS_L1_CACHE_SHIFT_5
1338 default "4" if MIPS_L1_CACHE_SHIFT_4
1339 default "5"
1340
1341config ARC_CMDLINE_ONLY
1342 bool
1343
1344config ARC_CONSOLE
1345 bool "ARC console support"
1346 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1347
1348config ARC_MEMORY
1349 bool
1350
1351config ARC_PROMLIB
1352 bool
1353
1354config FW_ARC64
1355 bool
1356
1357config BOOT_ELF64
1358 bool
1359
1360menu "CPU selection"
1361
1362choice
1363 prompt "CPU type"
1364 default CPU_R4X00
1365
1366config CPU_LOONGSON64
1367 bool "Loongson 64-bit CPU"
1368 depends on SYS_HAS_CPU_LOONGSON64
1369 select ARCH_HAS_PHYS_TO_DMA
1370 select CPU_MIPSR2
1371 select CPU_HAS_PREFETCH
1372 select CPU_SUPPORTS_64BIT_KERNEL
1373 select CPU_SUPPORTS_HIGHMEM
1374 select CPU_SUPPORTS_HUGEPAGES
1375 select CPU_SUPPORTS_MSA
1376 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1377 select CPU_MIPSR2_IRQ_VI
1378 select WEAK_ORDERING
1379 select WEAK_REORDERING_BEYOND_LLSC
1380 select MIPS_ASID_BITS_VARIABLE
1381 select MIPS_PGD_C0_CONTEXT
1382 select MIPS_L1_CACHE_SHIFT_6
1383 select MIPS_FP_SUPPORT
1384 select GPIOLIB
1385 select SWIOTLB
1386 select HAVE_KVM
1387 help
1388 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1389 cores implements the MIPS64R2 instruction set with many extensions,
1390 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1391 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1392 Loongson-2E/2F is not covered here and will be removed in future.
1393
1394config LOONGSON3_ENHANCEMENT
1395 bool "New Loongson-3 CPU Enhancements"
1396 default n
1397 depends on CPU_LOONGSON64
1398 help
1399 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1400 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1401 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1402 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1403 Fast TLB refill support, etc.
1404
1405 This option enable those enhancements which are not probed at run
1406 time. If you want a generic kernel to run on all Loongson 3 machines,
1407 please say 'N' here. If you want a high-performance kernel to run on
1408 new Loongson-3 machines only, please say 'Y' here.
1409
1410config CPU_LOONGSON3_WORKAROUNDS
1411 bool "Old Loongson-3 LLSC Workarounds"
1412 default y if SMP
1413 depends on CPU_LOONGSON64
1414 help
1415 Loongson-3 processors have the llsc issues which require workarounds.
1416 Without workarounds the system may hang unexpectedly.
1417
1418 Newer Loongson-3 will fix these issues and no workarounds are needed.
1419 The workarounds have no significant side effect on them but may
1420 decrease the performance of the system so this option should be
1421 disabled unless the kernel is intended to be run on old systems.
1422
1423 If unsure, please say Y.
1424
1425config CPU_LOONGSON3_CPUCFG_EMULATION
1426 bool "Emulate the CPUCFG instruction on older Loongson cores"
1427 default y
1428 depends on CPU_LOONGSON64
1429 help
1430 Loongson-3A R4 and newer have the CPUCFG instruction available for
1431 userland to query CPU capabilities, much like CPUID on x86. This
1432 option provides emulation of the instruction on older Loongson
1433 cores, back to Loongson-3A1000.
1434
1435 If unsure, please say Y.
1436
1437config CPU_LOONGSON2E
1438 bool "Loongson 2E"
1439 depends on SYS_HAS_CPU_LOONGSON2E
1440 select CPU_LOONGSON2EF
1441 help
1442 The Loongson 2E processor implements the MIPS III instruction set
1443 with many extensions.
1444
1445 It has an internal FPGA northbridge, which is compatible to
1446 bonito64.
1447
1448config CPU_LOONGSON2F
1449 bool "Loongson 2F"
1450 depends on SYS_HAS_CPU_LOONGSON2F
1451 select CPU_LOONGSON2EF
1452 select GPIOLIB
1453 help
1454 The Loongson 2F processor implements the MIPS III instruction set
1455 with many extensions.
1456
1457 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1458 have a similar programming interface with FPGA northbridge used in
1459 Loongson2E.
1460
1461config CPU_LOONGSON1B
1462 bool "Loongson 1B"
1463 depends on SYS_HAS_CPU_LOONGSON1B
1464 select CPU_LOONGSON32
1465 select LEDS_GPIO_REGISTER
1466 help
1467 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1468 Release 1 instruction set and part of the MIPS32 Release 2
1469 instruction set.
1470
1471config CPU_LOONGSON1C
1472 bool "Loongson 1C"
1473 depends on SYS_HAS_CPU_LOONGSON1C
1474 select CPU_LOONGSON32
1475 select LEDS_GPIO_REGISTER
1476 help
1477 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1478 Release 1 instruction set and part of the MIPS32 Release 2
1479 instruction set.
1480
1481config CPU_MIPS32_R1
1482 bool "MIPS32 Release 1"
1483 depends on SYS_HAS_CPU_MIPS32_R1
1484 select CPU_HAS_PREFETCH
1485 select CPU_SUPPORTS_32BIT_KERNEL
1486 select CPU_SUPPORTS_HIGHMEM
1487 help
1488 Choose this option to build a kernel for release 1 or later of the
1489 MIPS32 architecture. Most modern embedded systems with a 32-bit
1490 MIPS processor are based on a MIPS32 processor. If you know the
1491 specific type of processor in your system, choose those that one
1492 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1493 Release 2 of the MIPS32 architecture is available since several
1494 years so chances are you even have a MIPS32 Release 2 processor
1495 in which case you should choose CPU_MIPS32_R2 instead for better
1496 performance.
1497
1498config CPU_MIPS32_R2
1499 bool "MIPS32 Release 2"
1500 depends on SYS_HAS_CPU_MIPS32_R2
1501 select CPU_HAS_PREFETCH
1502 select CPU_SUPPORTS_32BIT_KERNEL
1503 select CPU_SUPPORTS_HIGHMEM
1504 select CPU_SUPPORTS_MSA
1505 select HAVE_KVM
1506 help
1507 Choose this option to build a kernel for release 2 or later of the
1508 MIPS32 architecture. Most modern embedded systems with a 32-bit
1509 MIPS processor are based on a MIPS32 processor. If you know the
1510 specific type of processor in your system, choose those that one
1511 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1512
1513config CPU_MIPS32_R5
1514 bool "MIPS32 Release 5"
1515 depends on SYS_HAS_CPU_MIPS32_R5
1516 select CPU_HAS_PREFETCH
1517 select CPU_SUPPORTS_32BIT_KERNEL
1518 select CPU_SUPPORTS_HIGHMEM
1519 select CPU_SUPPORTS_MSA
1520 select HAVE_KVM
1521 select MIPS_O32_FP64_SUPPORT
1522 help
1523 Choose this option to build a kernel for release 5 or later of the
1524 MIPS32 architecture. New MIPS processors, starting with the Warrior
1525 family, are based on a MIPS32r5 processor. If you own an older
1526 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1527
1528config CPU_MIPS32_R6
1529 bool "MIPS32 Release 6"
1530 depends on SYS_HAS_CPU_MIPS32_R6
1531 select CPU_HAS_PREFETCH
1532 select CPU_NO_LOAD_STORE_LR
1533 select CPU_SUPPORTS_32BIT_KERNEL
1534 select CPU_SUPPORTS_HIGHMEM
1535 select CPU_SUPPORTS_MSA
1536 select HAVE_KVM
1537 select MIPS_O32_FP64_SUPPORT
1538 help
1539 Choose this option to build a kernel for release 6 or later of the
1540 MIPS32 architecture. New MIPS processors, starting with the Warrior
1541 family, are based on a MIPS32r6 processor. If you own an older
1542 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1543
1544config CPU_MIPS64_R1
1545 bool "MIPS64 Release 1"
1546 depends on SYS_HAS_CPU_MIPS64_R1
1547 select CPU_HAS_PREFETCH
1548 select CPU_SUPPORTS_32BIT_KERNEL
1549 select CPU_SUPPORTS_64BIT_KERNEL
1550 select CPU_SUPPORTS_HIGHMEM
1551 select CPU_SUPPORTS_HUGEPAGES
1552 help
1553 Choose this option to build a kernel for release 1 or later of the
1554 MIPS64 architecture. Many modern embedded systems with a 64-bit
1555 MIPS processor are based on a MIPS64 processor. If you know the
1556 specific type of processor in your system, choose those that one
1557 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1558 Release 2 of the MIPS64 architecture is available since several
1559 years so chances are you even have a MIPS64 Release 2 processor
1560 in which case you should choose CPU_MIPS64_R2 instead for better
1561 performance.
1562
1563config CPU_MIPS64_R2
1564 bool "MIPS64 Release 2"
1565 depends on SYS_HAS_CPU_MIPS64_R2
1566 select CPU_HAS_PREFETCH
1567 select CPU_SUPPORTS_32BIT_KERNEL
1568 select CPU_SUPPORTS_64BIT_KERNEL
1569 select CPU_SUPPORTS_HIGHMEM
1570 select CPU_SUPPORTS_HUGEPAGES
1571 select CPU_SUPPORTS_MSA
1572 select HAVE_KVM
1573 help
1574 Choose this option to build a kernel for release 2 or later of the
1575 MIPS64 architecture. Many modern embedded systems with a 64-bit
1576 MIPS processor are based on a MIPS64 processor. If you know the
1577 specific type of processor in your system, choose those that one
1578 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1579
1580config CPU_MIPS64_R5
1581 bool "MIPS64 Release 5"
1582 depends on SYS_HAS_CPU_MIPS64_R5
1583 select CPU_HAS_PREFETCH
1584 select CPU_SUPPORTS_32BIT_KERNEL
1585 select CPU_SUPPORTS_64BIT_KERNEL
1586 select CPU_SUPPORTS_HIGHMEM
1587 select CPU_SUPPORTS_HUGEPAGES
1588 select CPU_SUPPORTS_MSA
1589 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1590 select HAVE_KVM
1591 help
1592 Choose this option to build a kernel for release 5 or later of the
1593 MIPS64 architecture. This is a intermediate MIPS architecture
1594 release partly implementing release 6 features. Though there is no
1595 any hardware known to be based on this release.
1596
1597config CPU_MIPS64_R6
1598 bool "MIPS64 Release 6"
1599 depends on SYS_HAS_CPU_MIPS64_R6
1600 select CPU_HAS_PREFETCH
1601 select CPU_NO_LOAD_STORE_LR
1602 select CPU_SUPPORTS_32BIT_KERNEL
1603 select CPU_SUPPORTS_64BIT_KERNEL
1604 select CPU_SUPPORTS_HIGHMEM
1605 select CPU_SUPPORTS_HUGEPAGES
1606 select CPU_SUPPORTS_MSA
1607 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1608 select HAVE_KVM
1609 help
1610 Choose this option to build a kernel for release 6 or later of the
1611 MIPS64 architecture. New MIPS processors, starting with the Warrior
1612 family, are based on a MIPS64r6 processor. If you own an older
1613 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1614
1615config CPU_P5600
1616 bool "MIPS Warrior P5600"
1617 depends on SYS_HAS_CPU_P5600
1618 select CPU_HAS_PREFETCH
1619 select CPU_SUPPORTS_32BIT_KERNEL
1620 select CPU_SUPPORTS_HIGHMEM
1621 select CPU_SUPPORTS_MSA
1622 select CPU_SUPPORTS_CPUFREQ
1623 select CPU_MIPSR2_IRQ_VI
1624 select CPU_MIPSR2_IRQ_EI
1625 select HAVE_KVM
1626 select MIPS_O32_FP64_SUPPORT
1627 help
1628 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1629 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1630 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1631 level features like up to six P5600 calculation cores, CM2 with L2
1632 cache, IOCU/IOMMU (though might be unused depending on the system-
1633 specific IP core configuration), GIC, CPC, virtualisation module,
1634 eJTAG and PDtrace.
1635
1636config CPU_R3000
1637 bool "R3000"
1638 depends on SYS_HAS_CPU_R3000
1639 select CPU_HAS_WB
1640 select CPU_R3K_TLB
1641 select CPU_SUPPORTS_32BIT_KERNEL
1642 select CPU_SUPPORTS_HIGHMEM
1643 help
1644 Please make sure to pick the right CPU type. Linux/MIPS is not
1645 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1646 *not* work on R4000 machines and vice versa. However, since most
1647 of the supported machines have an R4000 (or similar) CPU, R4x00
1648 might be a safe bet. If the resulting kernel does not work,
1649 try to recompile with R3000.
1650
1651config CPU_TX39XX
1652 bool "R39XX"
1653 depends on SYS_HAS_CPU_TX39XX
1654 select CPU_SUPPORTS_32BIT_KERNEL
1655 select CPU_R3K_TLB
1656
1657config CPU_VR41XX
1658 bool "R41xx"
1659 depends on SYS_HAS_CPU_VR41XX
1660 select CPU_SUPPORTS_32BIT_KERNEL
1661 select CPU_SUPPORTS_64BIT_KERNEL
1662 help
1663 The options selects support for the NEC VR4100 series of processors.
1664 Only choose this option if you have one of these processors as a
1665 kernel built with this option will not run on any other type of
1666 processor or vice versa.
1667
1668config CPU_R4X00
1669 bool "R4x00"
1670 depends on SYS_HAS_CPU_R4X00
1671 select CPU_SUPPORTS_32BIT_KERNEL
1672 select CPU_SUPPORTS_64BIT_KERNEL
1673 select CPU_SUPPORTS_HUGEPAGES
1674 help
1675 MIPS Technologies R4000-series processors other than 4300, including
1676 the R4000, R4400, R4600, and 4700.
1677
1678config CPU_TX49XX
1679 bool "R49XX"
1680 depends on SYS_HAS_CPU_TX49XX
1681 select CPU_HAS_PREFETCH
1682 select CPU_SUPPORTS_32BIT_KERNEL
1683 select CPU_SUPPORTS_64BIT_KERNEL
1684 select CPU_SUPPORTS_HUGEPAGES
1685
1686config CPU_R5000
1687 bool "R5000"
1688 depends on SYS_HAS_CPU_R5000
1689 select CPU_SUPPORTS_32BIT_KERNEL
1690 select CPU_SUPPORTS_64BIT_KERNEL
1691 select CPU_SUPPORTS_HUGEPAGES
1692 help
1693 MIPS Technologies R5000-series processors other than the Nevada.
1694
1695config CPU_R5500
1696 bool "R5500"
1697 depends on SYS_HAS_CPU_R5500
1698 select CPU_SUPPORTS_32BIT_KERNEL
1699 select CPU_SUPPORTS_64BIT_KERNEL
1700 select CPU_SUPPORTS_HUGEPAGES
1701 help
1702 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1703 instruction set.
1704
1705config CPU_NEVADA
1706 bool "RM52xx"
1707 depends on SYS_HAS_CPU_NEVADA
1708 select CPU_SUPPORTS_32BIT_KERNEL
1709 select CPU_SUPPORTS_64BIT_KERNEL
1710 select CPU_SUPPORTS_HUGEPAGES
1711 help
1712 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1713
1714config CPU_R10000
1715 bool "R10000"
1716 depends on SYS_HAS_CPU_R10000
1717 select CPU_HAS_PREFETCH
1718 select CPU_SUPPORTS_32BIT_KERNEL
1719 select CPU_SUPPORTS_64BIT_KERNEL
1720 select CPU_SUPPORTS_HIGHMEM
1721 select CPU_SUPPORTS_HUGEPAGES
1722 help
1723 MIPS Technologies R10000-series processors.
1724
1725config CPU_RM7000
1726 bool "RM7000"
1727 depends on SYS_HAS_CPU_RM7000
1728 select CPU_HAS_PREFETCH
1729 select CPU_SUPPORTS_32BIT_KERNEL
1730 select CPU_SUPPORTS_64BIT_KERNEL
1731 select CPU_SUPPORTS_HIGHMEM
1732 select CPU_SUPPORTS_HUGEPAGES
1733
1734config CPU_SB1
1735 bool "SB1"
1736 depends on SYS_HAS_CPU_SB1
1737 select CPU_SUPPORTS_32BIT_KERNEL
1738 select CPU_SUPPORTS_64BIT_KERNEL
1739 select CPU_SUPPORTS_HIGHMEM
1740 select CPU_SUPPORTS_HUGEPAGES
1741 select WEAK_ORDERING
1742
1743config CPU_CAVIUM_OCTEON
1744 bool "Cavium Octeon processor"
1745 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1746 select CPU_HAS_PREFETCH
1747 select CPU_SUPPORTS_64BIT_KERNEL
1748 select WEAK_ORDERING
1749 select CPU_SUPPORTS_HIGHMEM
1750 select CPU_SUPPORTS_HUGEPAGES
1751 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1752 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1753 select MIPS_L1_CACHE_SHIFT_7
1754 select HAVE_KVM
1755 help
1756 The Cavium Octeon processor is a highly integrated chip containing
1757 many ethernet hardware widgets for networking tasks. The processor
1758 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1759 Full details can be found at http://www.caviumnetworks.com.
1760
1761config CPU_BMIPS
1762 bool "Broadcom BMIPS"
1763 depends on SYS_HAS_CPU_BMIPS
1764 select CPU_MIPS32
1765 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1766 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1767 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1768 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1769 select CPU_SUPPORTS_32BIT_KERNEL
1770 select DMA_NONCOHERENT
1771 select IRQ_MIPS_CPU
1772 select SWAP_IO_SPACE
1773 select WEAK_ORDERING
1774 select CPU_SUPPORTS_HIGHMEM
1775 select CPU_HAS_PREFETCH
1776 select CPU_SUPPORTS_CPUFREQ
1777 select MIPS_EXTERNAL_TIMER
1778 help
1779 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1780
1781config CPU_XLR
1782 bool "Netlogic XLR SoC"
1783 depends on SYS_HAS_CPU_XLR
1784 select CPU_SUPPORTS_32BIT_KERNEL
1785 select CPU_SUPPORTS_64BIT_KERNEL
1786 select CPU_SUPPORTS_HIGHMEM
1787 select CPU_SUPPORTS_HUGEPAGES
1788 select WEAK_ORDERING
1789 select WEAK_REORDERING_BEYOND_LLSC
1790 help
1791 Netlogic Microsystems XLR/XLS processors.
1792
1793config CPU_XLP
1794 bool "Netlogic XLP SoC"
1795 depends on SYS_HAS_CPU_XLP
1796 select CPU_SUPPORTS_32BIT_KERNEL
1797 select CPU_SUPPORTS_64BIT_KERNEL
1798 select CPU_SUPPORTS_HIGHMEM
1799 select WEAK_ORDERING
1800 select WEAK_REORDERING_BEYOND_LLSC
1801 select CPU_HAS_PREFETCH
1802 select CPU_MIPSR2
1803 select CPU_SUPPORTS_HUGEPAGES
1804 select MIPS_ASID_BITS_VARIABLE
1805 help
1806 Netlogic Microsystems XLP processors.
1807endchoice
1808
1809config CPU_MIPS32_3_5_FEATURES
1810 bool "MIPS32 Release 3.5 Features"
1811 depends on SYS_HAS_CPU_MIPS32_R3_5
1812 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1813 CPU_P5600
1814 help
1815 Choose this option to build a kernel for release 2 or later of the
1816 MIPS32 architecture including features from the 3.5 release such as
1817 support for Enhanced Virtual Addressing (EVA).
1818
1819config CPU_MIPS32_3_5_EVA
1820 bool "Enhanced Virtual Addressing (EVA)"
1821 depends on CPU_MIPS32_3_5_FEATURES
1822 select EVA
1823 default y
1824 help
1825 Choose this option if you want to enable the Enhanced Virtual
1826 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1827 One of its primary benefits is an increase in the maximum size
1828 of lowmem (up to 3GB). If unsure, say 'N' here.
1829
1830config CPU_MIPS32_R5_FEATURES
1831 bool "MIPS32 Release 5 Features"
1832 depends on SYS_HAS_CPU_MIPS32_R5
1833 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1834 help
1835 Choose this option to build a kernel for release 2 or later of the
1836 MIPS32 architecture including features from release 5 such as
1837 support for Extended Physical Addressing (XPA).
1838
1839config CPU_MIPS32_R5_XPA
1840 bool "Extended Physical Addressing (XPA)"
1841 depends on CPU_MIPS32_R5_FEATURES
1842 depends on !EVA
1843 depends on !PAGE_SIZE_4KB
1844 depends on SYS_SUPPORTS_HIGHMEM
1845 select XPA
1846 select HIGHMEM
1847 select PHYS_ADDR_T_64BIT
1848 default n
1849 help
1850 Choose this option if you want to enable the Extended Physical
1851 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1852 benefit is to increase physical addressing equal to or greater
1853 than 40 bits. Note that this has the side effect of turning on
1854 64-bit addressing which in turn makes the PTEs 64-bit in size.
1855 If unsure, say 'N' here.
1856
1857if CPU_LOONGSON2F
1858config CPU_NOP_WORKAROUNDS
1859 bool
1860
1861config CPU_JUMP_WORKAROUNDS
1862 bool
1863
1864config CPU_LOONGSON2F_WORKAROUNDS
1865 bool "Loongson 2F Workarounds"
1866 default y
1867 select CPU_NOP_WORKAROUNDS
1868 select CPU_JUMP_WORKAROUNDS
1869 help
1870 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1871 require workarounds. Without workarounds the system may hang
1872 unexpectedly. For more information please refer to the gas
1873 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1874
1875 Loongson 2F03 and later have fixed these issues and no workarounds
1876 are needed. The workarounds have no significant side effect on them
1877 but may decrease the performance of the system so this option should
1878 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1879 systems.
1880
1881 If unsure, please say Y.
1882endif # CPU_LOONGSON2F
1883
1884config SYS_SUPPORTS_ZBOOT
1885 bool
1886 select HAVE_KERNEL_GZIP
1887 select HAVE_KERNEL_BZIP2
1888 select HAVE_KERNEL_LZ4
1889 select HAVE_KERNEL_LZMA
1890 select HAVE_KERNEL_LZO
1891 select HAVE_KERNEL_XZ
1892 select HAVE_KERNEL_ZSTD
1893
1894config SYS_SUPPORTS_ZBOOT_UART16550
1895 bool
1896 select SYS_SUPPORTS_ZBOOT
1897
1898config SYS_SUPPORTS_ZBOOT_UART_PROM
1899 bool
1900 select SYS_SUPPORTS_ZBOOT
1901
1902config CPU_LOONGSON2EF
1903 bool
1904 select CPU_SUPPORTS_32BIT_KERNEL
1905 select CPU_SUPPORTS_64BIT_KERNEL
1906 select CPU_SUPPORTS_HIGHMEM
1907 select CPU_SUPPORTS_HUGEPAGES
1908 select ARCH_HAS_PHYS_TO_DMA
1909
1910config CPU_LOONGSON32
1911 bool
1912 select CPU_MIPS32
1913 select CPU_MIPSR2
1914 select CPU_HAS_PREFETCH
1915 select CPU_SUPPORTS_32BIT_KERNEL
1916 select CPU_SUPPORTS_HIGHMEM
1917 select CPU_SUPPORTS_CPUFREQ
1918
1919config CPU_BMIPS32_3300
1920 select SMP_UP if SMP
1921 bool
1922
1923config CPU_BMIPS4350
1924 bool
1925 select SYS_SUPPORTS_SMP
1926 select SYS_SUPPORTS_HOTPLUG_CPU
1927
1928config CPU_BMIPS4380
1929 bool
1930 select MIPS_L1_CACHE_SHIFT_6
1931 select SYS_SUPPORTS_SMP
1932 select SYS_SUPPORTS_HOTPLUG_CPU
1933 select CPU_HAS_RIXI
1934
1935config CPU_BMIPS5000
1936 bool
1937 select MIPS_CPU_SCACHE
1938 select MIPS_L1_CACHE_SHIFT_7
1939 select SYS_SUPPORTS_SMP
1940 select SYS_SUPPORTS_HOTPLUG_CPU
1941 select CPU_HAS_RIXI
1942
1943config SYS_HAS_CPU_LOONGSON64
1944 bool
1945 select CPU_SUPPORTS_CPUFREQ
1946 select CPU_HAS_RIXI
1947
1948config SYS_HAS_CPU_LOONGSON2E
1949 bool
1950
1951config SYS_HAS_CPU_LOONGSON2F
1952 bool
1953 select CPU_SUPPORTS_CPUFREQ
1954 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1955
1956config SYS_HAS_CPU_LOONGSON1B
1957 bool
1958
1959config SYS_HAS_CPU_LOONGSON1C
1960 bool
1961
1962config SYS_HAS_CPU_MIPS32_R1
1963 bool
1964
1965config SYS_HAS_CPU_MIPS32_R2
1966 bool
1967
1968config SYS_HAS_CPU_MIPS32_R3_5
1969 bool
1970
1971config SYS_HAS_CPU_MIPS32_R5
1972 bool
1973 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1974
1975config SYS_HAS_CPU_MIPS32_R6
1976 bool
1977 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1978
1979config SYS_HAS_CPU_MIPS64_R1
1980 bool
1981
1982config SYS_HAS_CPU_MIPS64_R2
1983 bool
1984
1985config SYS_HAS_CPU_MIPS64_R5
1986 bool
1987 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1988
1989config SYS_HAS_CPU_MIPS64_R6
1990 bool
1991 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1992
1993config SYS_HAS_CPU_P5600
1994 bool
1995 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1996
1997config SYS_HAS_CPU_R3000
1998 bool
1999
2000config SYS_HAS_CPU_TX39XX
2001 bool
2002
2003config SYS_HAS_CPU_VR41XX
2004 bool
2005
2006config SYS_HAS_CPU_R4X00
2007 bool
2008
2009config SYS_HAS_CPU_TX49XX
2010 bool
2011
2012config SYS_HAS_CPU_R5000
2013 bool
2014
2015config SYS_HAS_CPU_R5500
2016 bool
2017
2018config SYS_HAS_CPU_NEVADA
2019 bool
2020
2021config SYS_HAS_CPU_R10000
2022 bool
2023 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2024
2025config SYS_HAS_CPU_RM7000
2026 bool
2027
2028config SYS_HAS_CPU_SB1
2029 bool
2030
2031config SYS_HAS_CPU_CAVIUM_OCTEON
2032 bool
2033
2034config SYS_HAS_CPU_BMIPS
2035 bool
2036
2037config SYS_HAS_CPU_BMIPS32_3300
2038 bool
2039 select SYS_HAS_CPU_BMIPS
2040
2041config SYS_HAS_CPU_BMIPS4350
2042 bool
2043 select SYS_HAS_CPU_BMIPS
2044
2045config SYS_HAS_CPU_BMIPS4380
2046 bool
2047 select SYS_HAS_CPU_BMIPS
2048
2049config SYS_HAS_CPU_BMIPS5000
2050 bool
2051 select SYS_HAS_CPU_BMIPS
2052 select ARCH_HAS_SYNC_DMA_FOR_CPU
2053
2054config SYS_HAS_CPU_XLR
2055 bool
2056
2057config SYS_HAS_CPU_XLP
2058 bool
2059
2060#
2061# CPU may reorder R->R, R->W, W->R, W->W
2062# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2063#
2064config WEAK_ORDERING
2065 bool
2066
2067#
2068# CPU may reorder reads and writes beyond LL/SC
2069# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2070#
2071config WEAK_REORDERING_BEYOND_LLSC
2072 bool
2073endmenu
2074
2075#
2076# These two indicate any level of the MIPS32 and MIPS64 architecture
2077#
2078config CPU_MIPS32
2079 bool
2080 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2081 CPU_MIPS32_R6 || CPU_P5600
2082
2083config CPU_MIPS64
2084 bool
2085 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2086 CPU_MIPS64_R6
2087
2088#
2089# These indicate the revision of the architecture
2090#
2091config CPU_MIPSR1
2092 bool
2093 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2094
2095config CPU_MIPSR2
2096 bool
2097 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2098 select CPU_HAS_RIXI
2099 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2100 select MIPS_SPRAM
2101
2102config CPU_MIPSR5
2103 bool
2104 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2105 select CPU_HAS_RIXI
2106 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2107 select MIPS_SPRAM
2108
2109config CPU_MIPSR6
2110 bool
2111 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2112 select CPU_HAS_RIXI
2113 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2114 select HAVE_ARCH_BITREVERSE
2115 select MIPS_ASID_BITS_VARIABLE
2116 select MIPS_CRC_SUPPORT
2117 select MIPS_SPRAM
2118
2119config TARGET_ISA_REV
2120 int
2121 default 1 if CPU_MIPSR1
2122 default 2 if CPU_MIPSR2
2123 default 5 if CPU_MIPSR5
2124 default 6 if CPU_MIPSR6
2125 default 0
2126 help
2127 Reflects the ISA revision being targeted by the kernel build. This
2128 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2129
2130config EVA
2131 bool
2132
2133config XPA
2134 bool
2135
2136config SYS_SUPPORTS_32BIT_KERNEL
2137 bool
2138config SYS_SUPPORTS_64BIT_KERNEL
2139 bool
2140config CPU_SUPPORTS_32BIT_KERNEL
2141 bool
2142config CPU_SUPPORTS_64BIT_KERNEL
2143 bool
2144config CPU_SUPPORTS_CPUFREQ
2145 bool
2146config CPU_SUPPORTS_ADDRWINCFG
2147 bool
2148config CPU_SUPPORTS_HUGEPAGES
2149 bool
2150 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2151config MIPS_PGD_C0_CONTEXT
2152 bool
2153 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2154
2155#
2156# Set to y for ptrace access to watch registers.
2157#
2158config HARDWARE_WATCHPOINTS
2159 bool
2160 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2161
2162menu "Kernel type"
2163
2164choice
2165 prompt "Kernel code model"
2166 help
2167 You should only select this option if you have a workload that
2168 actually benefits from 64-bit processing or if your machine has
2169 large memory. You will only be presented a single option in this
2170 menu if your system does not support both 32-bit and 64-bit kernels.
2171
2172config 32BIT
2173 bool "32-bit kernel"
2174 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2175 select TRAD_SIGNALS
2176 help
2177 Select this option if you want to build a 32-bit kernel.
2178
2179config 64BIT
2180 bool "64-bit kernel"
2181 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2182 help
2183 Select this option if you want to build a 64-bit kernel.
2184
2185endchoice
2186
2187config KVM_GUEST
2188 bool "KVM Guest Kernel"
2189 depends on CPU_MIPS32_R2
2190 depends on BROKEN_ON_SMP
2191 help
2192 Select this option if building a guest kernel for KVM (Trap & Emulate)
2193 mode.
2194
2195config KVM_GUEST_TIMER_FREQ
2196 int "Count/Compare Timer Frequency (MHz)"
2197 depends on KVM_GUEST
2198 default 100
2199 help
2200 Set this to non-zero if building a guest kernel for KVM to skip RTC
2201 emulation when determining guest CPU Frequency. Instead, the guest's
2202 timer frequency is specified directly.
2203
2204config MIPS_VA_BITS_48
2205 bool "48 bits virtual memory"
2206 depends on 64BIT
2207 help
2208 Support a maximum at least 48 bits of application virtual
2209 memory. Default is 40 bits or less, depending on the CPU.
2210 For page sizes 16k and above, this option results in a small
2211 memory overhead for page tables. For 4k page size, a fourth
2212 level of page tables is added which imposes both a memory
2213 overhead as well as slower TLB fault handling.
2214
2215 If unsure, say N.
2216
2217choice
2218 prompt "Kernel page size"
2219 default PAGE_SIZE_4KB
2220
2221config PAGE_SIZE_4KB
2222 bool "4kB"
2223 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2224 help
2225 This option select the standard 4kB Linux page size. On some
2226 R3000-family processors this is the only available page size. Using
2227 4kB page size will minimize memory consumption and is therefore
2228 recommended for low memory systems.
2229
2230config PAGE_SIZE_8KB
2231 bool "8kB"
2232 depends on CPU_CAVIUM_OCTEON
2233 depends on !MIPS_VA_BITS_48
2234 help
2235 Using 8kB page size will result in higher performance kernel at
2236 the price of higher memory consumption. This option is available
2237 only on cnMIPS processors. Note that you will need a suitable Linux
2238 distribution to support this.
2239
2240config PAGE_SIZE_16KB
2241 bool "16kB"
2242 depends on !CPU_R3000 && !CPU_TX39XX
2243 help
2244 Using 16kB page size will result in higher performance kernel at
2245 the price of higher memory consumption. This option is available on
2246 all non-R3000 family processors. Note that you will need a suitable
2247 Linux distribution to support this.
2248
2249config PAGE_SIZE_32KB
2250 bool "32kB"
2251 depends on CPU_CAVIUM_OCTEON
2252 depends on !MIPS_VA_BITS_48
2253 help
2254 Using 32kB page size will result in higher performance kernel at
2255 the price of higher memory consumption. This option is available
2256 only on cnMIPS cores. Note that you will need a suitable Linux
2257 distribution to support this.
2258
2259config PAGE_SIZE_64KB
2260 bool "64kB"
2261 depends on !CPU_R3000 && !CPU_TX39XX
2262 help
2263 Using 64kB page size will result in higher performance kernel at
2264 the price of higher memory consumption. This option is available on
2265 all non-R3000 family processor. Not that at the time of this
2266 writing this option is still high experimental.
2267
2268endchoice
2269
2270config FORCE_MAX_ZONEORDER
2271 int "Maximum zone order"
2272 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2273 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2274 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2275 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2276 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2277 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2278 range 0 64
2279 default "11"
2280 help
2281 The kernel memory allocator divides physically contiguous memory
2282 blocks into "zones", where each zone is a power of two number of
2283 pages. This option selects the largest power of two that the kernel
2284 keeps in the memory allocator. If you need to allocate very large
2285 blocks of physically contiguous memory, then you may need to
2286 increase this value.
2287
2288 This config option is actually maximum order plus one. For example,
2289 a value of 11 means that the largest free memory block is 2^10 pages.
2290
2291 The page size is not necessarily 4KB. Keep this in mind
2292 when choosing a value for this option.
2293
2294config BOARD_SCACHE
2295 bool
2296
2297config IP22_CPU_SCACHE
2298 bool
2299 select BOARD_SCACHE
2300
2301#
2302# Support for a MIPS32 / MIPS64 style S-caches
2303#
2304config MIPS_CPU_SCACHE
2305 bool
2306 select BOARD_SCACHE
2307
2308config R5000_CPU_SCACHE
2309 bool
2310 select BOARD_SCACHE
2311
2312config RM7000_CPU_SCACHE
2313 bool
2314 select BOARD_SCACHE
2315
2316config SIBYTE_DMA_PAGEOPS
2317 bool "Use DMA to clear/copy pages"
2318 depends on CPU_SB1
2319 help
2320 Instead of using the CPU to zero and copy pages, use a Data Mover
2321 channel. These DMA channels are otherwise unused by the standard
2322 SiByte Linux port. Seems to give a small performance benefit.
2323
2324config CPU_HAS_PREFETCH
2325 bool
2326
2327config CPU_GENERIC_DUMP_TLB
2328 bool
2329 default y if !(CPU_R3000 || CPU_TX39XX)
2330
2331config MIPS_FP_SUPPORT
2332 bool "Floating Point support" if EXPERT
2333 default y
2334 help
2335 Select y to include support for floating point in the kernel
2336 including initialization of FPU hardware, FP context save & restore
2337 and emulation of an FPU where necessary. Without this support any
2338 userland program attempting to use floating point instructions will
2339 receive a SIGILL.
2340
2341 If you know that your userland will not attempt to use floating point
2342 instructions then you can say n here to shrink the kernel a little.
2343
2344 If unsure, say y.
2345
2346config CPU_R2300_FPU
2347 bool
2348 depends on MIPS_FP_SUPPORT
2349 default y if CPU_R3000 || CPU_TX39XX
2350
2351config CPU_R3K_TLB
2352 bool
2353
2354config CPU_R4K_FPU
2355 bool
2356 depends on MIPS_FP_SUPPORT
2357 default y if !CPU_R2300_FPU
2358
2359config CPU_R4K_CACHE_TLB
2360 bool
2361 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2362
2363config MIPS_MT_SMP
2364 bool "MIPS MT SMP support (1 TC on each available VPE)"
2365 default y
2366 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2367 select CPU_MIPSR2_IRQ_VI
2368 select CPU_MIPSR2_IRQ_EI
2369 select SYNC_R4K
2370 select MIPS_MT
2371 select SMP
2372 select SMP_UP
2373 select SYS_SUPPORTS_SMP
2374 select SYS_SUPPORTS_SCHED_SMT
2375 select MIPS_PERF_SHARED_TC_COUNTERS
2376 help
2377 This is a kernel model which is known as SMVP. This is supported
2378 on cores with the MT ASE and uses the available VPEs to implement
2379 virtual processors which supports SMP. This is equivalent to the
2380 Intel Hyperthreading feature. For further information go to
2381 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2382
2383config MIPS_MT
2384 bool
2385
2386config SCHED_SMT
2387 bool "SMT (multithreading) scheduler support"
2388 depends on SYS_SUPPORTS_SCHED_SMT
2389 default n
2390 help
2391 SMT scheduler support improves the CPU scheduler's decision making
2392 when dealing with MIPS MT enabled cores at a cost of slightly
2393 increased overhead in some places. If unsure say N here.
2394
2395config SYS_SUPPORTS_SCHED_SMT
2396 bool
2397
2398config SYS_SUPPORTS_MULTITHREADING
2399 bool
2400
2401config MIPS_MT_FPAFF
2402 bool "Dynamic FPU affinity for FP-intensive threads"
2403 default y
2404 depends on MIPS_MT_SMP
2405
2406config MIPSR2_TO_R6_EMULATOR
2407 bool "MIPS R2-to-R6 emulator"
2408 depends on CPU_MIPSR6
2409 depends on MIPS_FP_SUPPORT
2410 default y
2411 help
2412 Choose this option if you want to run non-R6 MIPS userland code.
2413 Even if you say 'Y' here, the emulator will still be disabled by
2414 default. You can enable it using the 'mipsr2emu' kernel option.
2415 The only reason this is a build-time option is to save ~14K from the
2416 final kernel image.
2417
2418config SYS_SUPPORTS_VPE_LOADER
2419 bool
2420 depends on SYS_SUPPORTS_MULTITHREADING
2421 help
2422 Indicates that the platform supports the VPE loader, and provides
2423 physical_memsize.
2424
2425config MIPS_VPE_LOADER
2426 bool "VPE loader support."
2427 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2428 select CPU_MIPSR2_IRQ_VI
2429 select CPU_MIPSR2_IRQ_EI
2430 select MIPS_MT
2431 help
2432 Includes a loader for loading an elf relocatable object
2433 onto another VPE and running it.
2434
2435config MIPS_VPE_LOADER_CMP
2436 bool
2437 default "y"
2438 depends on MIPS_VPE_LOADER && MIPS_CMP
2439
2440config MIPS_VPE_LOADER_MT
2441 bool
2442 default "y"
2443 depends on MIPS_VPE_LOADER && !MIPS_CMP
2444
2445config MIPS_VPE_LOADER_TOM
2446 bool "Load VPE program into memory hidden from linux"
2447 depends on MIPS_VPE_LOADER
2448 default y
2449 help
2450 The loader can use memory that is present but has been hidden from
2451 Linux using the kernel command line option "mem=xxMB". It's up to
2452 you to ensure the amount you put in the option and the space your
2453 program requires is less or equal to the amount physically present.
2454
2455config MIPS_VPE_APSP_API
2456 bool "Enable support for AP/SP API (RTLX)"
2457 depends on MIPS_VPE_LOADER
2458
2459config MIPS_VPE_APSP_API_CMP
2460 bool
2461 default "y"
2462 depends on MIPS_VPE_APSP_API && MIPS_CMP
2463
2464config MIPS_VPE_APSP_API_MT
2465 bool
2466 default "y"
2467 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2468
2469config MIPS_CMP
2470 bool "MIPS CMP framework support (DEPRECATED)"
2471 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2472 select SMP
2473 select SYNC_R4K
2474 select SYS_SUPPORTS_SMP
2475 select WEAK_ORDERING
2476 default n
2477 help
2478 Select this if you are using a bootloader which implements the "CMP
2479 framework" protocol (ie. YAMON) and want your kernel to make use of
2480 its ability to start secondary CPUs.
2481
2482 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2483 instead of this.
2484
2485config MIPS_CPS
2486 bool "MIPS Coherent Processing System support"
2487 depends on SYS_SUPPORTS_MIPS_CPS
2488 select MIPS_CM
2489 select MIPS_CPS_PM if HOTPLUG_CPU
2490 select SMP
2491 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2492 select SYS_SUPPORTS_HOTPLUG_CPU
2493 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2494 select SYS_SUPPORTS_SMP
2495 select WEAK_ORDERING
2496 help
2497 Select this if you wish to run an SMP kernel across multiple cores
2498 within a MIPS Coherent Processing System. When this option is
2499 enabled the kernel will probe for other cores and boot them with
2500 no external assistance. It is safe to enable this when hardware
2501 support is unavailable.
2502
2503config MIPS_CPS_PM
2504 depends on MIPS_CPS
2505 bool
2506
2507config MIPS_CM
2508 bool
2509 select MIPS_CPC
2510
2511config MIPS_CPC
2512 bool
2513
2514config SB1_PASS_2_WORKAROUNDS
2515 bool
2516 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2517 default y
2518
2519config SB1_PASS_2_1_WORKAROUNDS
2520 bool
2521 depends on CPU_SB1 && CPU_SB1_PASS_2
2522 default y
2523
2524choice
2525 prompt "SmartMIPS or microMIPS ASE support"
2526
2527config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2528 bool "None"
2529 help
2530 Select this if you want neither microMIPS nor SmartMIPS support
2531
2532config CPU_HAS_SMARTMIPS
2533 depends on SYS_SUPPORTS_SMARTMIPS
2534 bool "SmartMIPS"
2535 help
2536 SmartMIPS is a extension of the MIPS32 architecture aimed at
2537 increased security at both hardware and software level for
2538 smartcards. Enabling this option will allow proper use of the
2539 SmartMIPS instructions by Linux applications. However a kernel with
2540 this option will not work on a MIPS core without SmartMIPS core. If
2541 you don't know you probably don't have SmartMIPS and should say N
2542 here.
2543
2544config CPU_MICROMIPS
2545 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2546 bool "microMIPS"
2547 help
2548 When this option is enabled the kernel will be built using the
2549 microMIPS ISA
2550
2551endchoice
2552
2553config CPU_HAS_MSA
2554 bool "Support for the MIPS SIMD Architecture"
2555 depends on CPU_SUPPORTS_MSA
2556 depends on MIPS_FP_SUPPORT
2557 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2558 help
2559 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2560 and a set of SIMD instructions to operate on them. When this option
2561 is enabled the kernel will support allocating & switching MSA
2562 vector register contexts. If you know that your kernel will only be
2563 running on CPUs which do not support MSA or that your userland will
2564 not be making use of it then you may wish to say N here to reduce
2565 the size & complexity of your kernel.
2566
2567 If unsure, say Y.
2568
2569config CPU_HAS_WB
2570 bool
2571
2572config XKS01
2573 bool
2574
2575config CPU_HAS_DIEI
2576 depends on !CPU_DIEI_BROKEN
2577 bool
2578
2579config CPU_DIEI_BROKEN
2580 bool
2581
2582config CPU_HAS_RIXI
2583 bool
2584
2585config CPU_NO_LOAD_STORE_LR
2586 bool
2587 help
2588 CPU lacks support for unaligned load and store instructions:
2589 LWL, LWR, SWL, SWR (Load/store word left/right).
2590 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2591 systems).
2592
2593#
2594# Vectored interrupt mode is an R2 feature
2595#
2596config CPU_MIPSR2_IRQ_VI
2597 bool
2598
2599#
2600# Extended interrupt mode is an R2 feature
2601#
2602config CPU_MIPSR2_IRQ_EI
2603 bool
2604
2605config CPU_HAS_SYNC
2606 bool
2607 depends on !CPU_R3000
2608 default y
2609
2610#
2611# CPU non-features
2612#
2613config CPU_DADDI_WORKAROUNDS
2614 bool
2615
2616config CPU_R4000_WORKAROUNDS
2617 bool
2618 select CPU_R4400_WORKAROUNDS
2619
2620config CPU_R4400_WORKAROUNDS
2621 bool
2622
2623config CPU_R4X00_BUGS64
2624 bool
2625 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2626
2627config MIPS_ASID_SHIFT
2628 int
2629 default 6 if CPU_R3000 || CPU_TX39XX
2630 default 0
2631
2632config MIPS_ASID_BITS
2633 int
2634 default 0 if MIPS_ASID_BITS_VARIABLE
2635 default 6 if CPU_R3000 || CPU_TX39XX
2636 default 8
2637
2638config MIPS_ASID_BITS_VARIABLE
2639 bool
2640
2641config MIPS_CRC_SUPPORT
2642 bool
2643
2644# R4600 erratum. Due to the lack of errata information the exact
2645# technical details aren't known. I've experimentally found that disabling
2646# interrupts during indexed I-cache flushes seems to be sufficient to deal
2647# with the issue.
2648config WAR_R4600_V1_INDEX_ICACHEOP
2649 bool
2650
2651# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2652#
2653# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2654# Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2655# executed if there is no other dcache activity. If the dcache is
2656# accessed for another instruction immeidately preceding when these
2657# cache instructions are executing, it is possible that the dcache
2658# tag match outputs used by these cache instructions will be
2659# incorrect. These cache instructions should be preceded by at least
2660# four instructions that are not any kind of load or store
2661# instruction.
2662#
2663# This is not allowed: lw
2664# nop
2665# nop
2666# nop
2667# cache Hit_Writeback_Invalidate_D
2668#
2669# This is allowed: lw
2670# nop
2671# nop
2672# nop
2673# nop
2674# cache Hit_Writeback_Invalidate_D
2675config WAR_R4600_V1_HIT_CACHEOP
2676 bool
2677
2678# Writeback and invalidate the primary cache dcache before DMA.
2679#
2680# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2681# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2682# operate correctly if the internal data cache refill buffer is empty. These
2683# CACHE instructions should be separated from any potential data cache miss
2684# by a load instruction to an uncached address to empty the response buffer."
2685# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2686# in .pdf format.)
2687config WAR_R4600_V2_HIT_CACHEOP
2688 bool
2689
2690# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2691# the line which this instruction itself exists, the following
2692# operation is not guaranteed."
2693#
2694# Workaround: do two phase flushing for Index_Invalidate_I
2695config WAR_TX49XX_ICACHE_INDEX_INV
2696 bool
2697
2698# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2699# opposes it being called that) where invalid instructions in the same
2700# I-cache line worth of instructions being fetched may case spurious
2701# exceptions.
2702config WAR_ICACHE_REFILLS
2703 bool
2704
2705# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2706# may cause ll / sc and lld / scd sequences to execute non-atomically.
2707config WAR_R10000_LLSC
2708 bool
2709
2710# 34K core erratum: "Problems Executing the TLBR Instruction"
2711config WAR_MIPS34K_MISSED_ITLB
2712 bool
2713
2714#
2715# - Highmem only makes sense for the 32-bit kernel.
2716# - The current highmem code will only work properly on physically indexed
2717# caches such as R3000, SB1, R7000 or those that look like they're virtually
2718# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2719# moment we protect the user and offer the highmem option only on machines
2720# where it's known to be safe. This will not offer highmem on a few systems
2721# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2722# indexed CPUs but we're playing safe.
2723# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2724# know they might have memory configurations that could make use of highmem
2725# support.
2726#
2727config HIGHMEM
2728 bool "High Memory Support"
2729 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2730
2731config CPU_SUPPORTS_HIGHMEM
2732 bool
2733
2734config SYS_SUPPORTS_HIGHMEM
2735 bool
2736
2737config SYS_SUPPORTS_SMARTMIPS
2738 bool
2739
2740config SYS_SUPPORTS_MICROMIPS
2741 bool
2742
2743config SYS_SUPPORTS_MIPS16
2744 bool
2745 help
2746 This option must be set if a kernel might be executed on a MIPS16-
2747 enabled CPU even if MIPS16 is not actually being used. In other
2748 words, it makes the kernel MIPS16-tolerant.
2749
2750config CPU_SUPPORTS_MSA
2751 bool
2752
2753config ARCH_FLATMEM_ENABLE
2754 def_bool y
2755 depends on !NUMA && !CPU_LOONGSON2EF
2756
2757config ARCH_SPARSEMEM_ENABLE
2758 bool
2759 select SPARSEMEM_STATIC if !SGI_IP27
2760
2761config NUMA
2762 bool "NUMA Support"
2763 depends on SYS_SUPPORTS_NUMA
2764 help
2765 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2766 Access). This option improves performance on systems with more
2767 than two nodes; on two node systems it is generally better to
2768 leave it disabled; on single node systems leave this option
2769 disabled.
2770
2771config SYS_SUPPORTS_NUMA
2772 bool
2773
2774config HAVE_SETUP_PER_CPU_AREA
2775 def_bool y
2776 depends on NUMA
2777
2778config NEED_PER_CPU_EMBED_FIRST_CHUNK
2779 def_bool y
2780 depends on NUMA
2781
2782config RELOCATABLE
2783 bool "Relocatable kernel"
2784 depends on SYS_SUPPORTS_RELOCATABLE
2785 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2786 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2787 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2788 CPU_P5600 || CAVIUM_OCTEON_SOC
2789 help
2790 This builds a kernel image that retains relocation information
2791 so it can be loaded someplace besides the default 1MB.
2792 The relocations make the kernel binary about 15% larger,
2793 but are discarded at runtime
2794
2795config RELOCATION_TABLE_SIZE
2796 hex "Relocation table size"
2797 depends on RELOCATABLE
2798 range 0x0 0x01000000
2799 default "0x00100000"
2800 help
2801 A table of relocation data will be appended to the kernel binary
2802 and parsed at boot to fix up the relocated kernel.
2803
2804 This option allows the amount of space reserved for the table to be
2805 adjusted, although the default of 1Mb should be ok in most cases.
2806
2807 The build will fail and a valid size suggested if this is too small.
2808
2809 If unsure, leave at the default value.
2810
2811config RANDOMIZE_BASE
2812 bool "Randomize the address of the kernel image"
2813 depends on RELOCATABLE
2814 help
2815 Randomizes the physical and virtual address at which the
2816 kernel image is loaded, as a security feature that
2817 deters exploit attempts relying on knowledge of the location
2818 of kernel internals.
2819
2820 Entropy is generated using any coprocessor 0 registers available.
2821
2822 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2823
2824 If unsure, say N.
2825
2826config RANDOMIZE_BASE_MAX_OFFSET
2827 hex "Maximum kASLR offset" if EXPERT
2828 depends on RANDOMIZE_BASE
2829 range 0x0 0x40000000 if EVA || 64BIT
2830 range 0x0 0x08000000
2831 default "0x01000000"
2832 help
2833 When kASLR is active, this provides the maximum offset that will
2834 be applied to the kernel image. It should be set according to the
2835 amount of physical RAM available in the target system minus
2836 PHYSICAL_START and must be a power of 2.
2837
2838 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2839 EVA or 64-bit. The default is 16Mb.
2840
2841config NODES_SHIFT
2842 int
2843 default "6"
2844 depends on NEED_MULTIPLE_NODES
2845
2846config HW_PERF_EVENTS
2847 bool "Enable hardware performance counter support for perf events"
2848 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2849 default y
2850 help
2851 Enable hardware performance counter support for perf events. If
2852 disabled, perf events will use software events only.
2853
2854config DMI
2855 bool "Enable DMI scanning"
2856 depends on MACH_LOONGSON64
2857 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2858 default y
2859 help
2860 Enabled scanning of DMI to identify machine quirks. Say Y
2861 here unless you have verified that your setup is not
2862 affected by entries in the DMI blacklist. Required by PNP
2863 BIOS code.
2864
2865config SMP
2866 bool "Multi-Processing support"
2867 depends on SYS_SUPPORTS_SMP
2868 help
2869 This enables support for systems with more than one CPU. If you have
2870 a system with only one CPU, say N. If you have a system with more
2871 than one CPU, say Y.
2872
2873 If you say N here, the kernel will run on uni- and multiprocessor
2874 machines, but will use only one CPU of a multiprocessor machine. If
2875 you say Y here, the kernel will run on many, but not all,
2876 uniprocessor machines. On a uniprocessor machine, the kernel
2877 will run faster if you say N here.
2878
2879 People using multiprocessor machines who say Y here should also say
2880 Y to "Enhanced Real Time Clock Support", below.
2881
2882 See also the SMP-HOWTO available at
2883 <https://www.tldp.org/docs.html#howto>.
2884
2885 If you don't know what to do here, say N.
2886
2887config HOTPLUG_CPU
2888 bool "Support for hot-pluggable CPUs"
2889 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2890 help
2891 Say Y here to allow turning CPUs off and on. CPUs can be
2892 controlled through /sys/devices/system/cpu.
2893 (Note: power management support will enable this option
2894 automatically on SMP systems. )
2895 Say N if you want to disable CPU hotplug.
2896
2897config SMP_UP
2898 bool
2899
2900config SYS_SUPPORTS_MIPS_CMP
2901 bool
2902
2903config SYS_SUPPORTS_MIPS_CPS
2904 bool
2905
2906config SYS_SUPPORTS_SMP
2907 bool
2908
2909config NR_CPUS_DEFAULT_4
2910 bool
2911
2912config NR_CPUS_DEFAULT_8
2913 bool
2914
2915config NR_CPUS_DEFAULT_16
2916 bool
2917
2918config NR_CPUS_DEFAULT_32
2919 bool
2920
2921config NR_CPUS_DEFAULT_64
2922 bool
2923
2924config NR_CPUS
2925 int "Maximum number of CPUs (2-256)"
2926 range 2 256
2927 depends on SMP
2928 default "4" if NR_CPUS_DEFAULT_4
2929 default "8" if NR_CPUS_DEFAULT_8
2930 default "16" if NR_CPUS_DEFAULT_16
2931 default "32" if NR_CPUS_DEFAULT_32
2932 default "64" if NR_CPUS_DEFAULT_64
2933 help
2934 This allows you to specify the maximum number of CPUs which this
2935 kernel will support. The maximum supported value is 32 for 32-bit
2936 kernel and 64 for 64-bit kernels; the minimum value which makes
2937 sense is 1 for Qemu (useful only for kernel debugging purposes)
2938 and 2 for all others.
2939
2940 This is purely to save memory - each supported CPU adds
2941 approximately eight kilobytes to the kernel image. For best
2942 performance should round up your number of processors to the next
2943 power of two.
2944
2945config MIPS_PERF_SHARED_TC_COUNTERS
2946 bool
2947
2948config MIPS_NR_CPU_NR_MAP_1024
2949 bool
2950
2951config MIPS_NR_CPU_NR_MAP
2952 int
2953 depends on SMP
2954 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2955 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2956
2957#
2958# Timer Interrupt Frequency Configuration
2959#
2960
2961choice
2962 prompt "Timer frequency"
2963 default HZ_250
2964 help
2965 Allows the configuration of the timer frequency.
2966
2967 config HZ_24
2968 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2969
2970 config HZ_48
2971 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2972
2973 config HZ_100
2974 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2975
2976 config HZ_128
2977 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2978
2979 config HZ_250
2980 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2981
2982 config HZ_256
2983 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2984
2985 config HZ_1000
2986 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2987
2988 config HZ_1024
2989 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2990
2991endchoice
2992
2993config SYS_SUPPORTS_24HZ
2994 bool
2995
2996config SYS_SUPPORTS_48HZ
2997 bool
2998
2999config SYS_SUPPORTS_100HZ
3000 bool
3001
3002config SYS_SUPPORTS_128HZ
3003 bool
3004
3005config SYS_SUPPORTS_250HZ
3006 bool
3007
3008config SYS_SUPPORTS_256HZ
3009 bool
3010
3011config SYS_SUPPORTS_1000HZ
3012 bool
3013
3014config SYS_SUPPORTS_1024HZ
3015 bool
3016
3017config SYS_SUPPORTS_ARBIT_HZ
3018 bool
3019 default y if !SYS_SUPPORTS_24HZ && \
3020 !SYS_SUPPORTS_48HZ && \
3021 !SYS_SUPPORTS_100HZ && \
3022 !SYS_SUPPORTS_128HZ && \
3023 !SYS_SUPPORTS_250HZ && \
3024 !SYS_SUPPORTS_256HZ && \
3025 !SYS_SUPPORTS_1000HZ && \
3026 !SYS_SUPPORTS_1024HZ
3027
3028config HZ
3029 int
3030 default 24 if HZ_24
3031 default 48 if HZ_48
3032 default 100 if HZ_100
3033 default 128 if HZ_128
3034 default 250 if HZ_250
3035 default 256 if HZ_256
3036 default 1000 if HZ_1000
3037 default 1024 if HZ_1024
3038
3039config SCHED_HRTICK
3040 def_bool HIGH_RES_TIMERS
3041
3042config KEXEC
3043 bool "Kexec system call"
3044 select KEXEC_CORE
3045 help
3046 kexec is a system call that implements the ability to shutdown your
3047 current kernel, and to start another kernel. It is like a reboot
3048 but it is independent of the system firmware. And like a reboot
3049 you can start any kernel with it, not just Linux.
3050
3051 The name comes from the similarity to the exec system call.
3052
3053 It is an ongoing process to be certain the hardware in a machine
3054 is properly shutdown, so do not be surprised if this code does not
3055 initially work for you. As of this writing the exact hardware
3056 interface is strongly in flux, so no good recommendation can be
3057 made.
3058
3059config CRASH_DUMP
3060 bool "Kernel crash dumps"
3061 help
3062 Generate crash dump after being started by kexec.
3063 This should be normally only set in special crash dump kernels
3064 which are loaded in the main kernel with kexec-tools into
3065 a specially reserved region and then later executed after
3066 a crash by kdump/kexec. The crash dump kernel must be compiled
3067 to a memory address not used by the main kernel or firmware using
3068 PHYSICAL_START.
3069
3070config PHYSICAL_START
3071 hex "Physical address where the kernel is loaded"
3072 default "0xffffffff84000000"
3073 depends on CRASH_DUMP
3074 help
3075 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3076 If you plan to use kernel for capturing the crash dump change
3077 this value to start of the reserved region (the "X" value as
3078 specified in the "crashkernel=YM@XM" command line boot parameter
3079 passed to the panic-ed kernel).
3080
3081config MIPS_O32_FP64_SUPPORT
3082 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3083 depends on 32BIT || MIPS32_O32
3084 help
3085 When this is enabled, the kernel will support use of 64-bit floating
3086 point registers with binaries using the O32 ABI along with the
3087 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3088 32-bit MIPS systems this support is at the cost of increasing the
3089 size and complexity of the compiled FPU emulator. Thus if you are
3090 running a MIPS32 system and know that none of your userland binaries
3091 will require 64-bit floating point, you may wish to reduce the size
3092 of your kernel & potentially improve FP emulation performance by
3093 saying N here.
3094
3095 Although binutils currently supports use of this flag the details
3096 concerning its effect upon the O32 ABI in userland are still being
3097 worked on. In order to avoid userland becoming dependant upon current
3098 behaviour before the details have been finalised, this option should
3099 be considered experimental and only enabled by those working upon
3100 said details.
3101
3102 If unsure, say N.
3103
3104config USE_OF
3105 bool
3106 select OF
3107 select OF_EARLY_FLATTREE
3108 select IRQ_DOMAIN
3109
3110config UHI_BOOT
3111 bool
3112
3113config BUILTIN_DTB
3114 bool
3115
3116choice
3117 prompt "Kernel appended dtb support" if USE_OF
3118 default MIPS_NO_APPENDED_DTB
3119
3120 config MIPS_NO_APPENDED_DTB
3121 bool "None"
3122 help
3123 Do not enable appended dtb support.
3124
3125 config MIPS_ELF_APPENDED_DTB
3126 bool "vmlinux"
3127 help
3128 With this option, the boot code will look for a device tree binary
3129 DTB) included in the vmlinux ELF section .appended_dtb. By default
3130 it is empty and the DTB can be appended using binutils command
3131 objcopy:
3132
3133 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3134
3135 This is meant as a backward compatiblity convenience for those
3136 systems with a bootloader that can't be upgraded to accommodate
3137 the documented boot protocol using a device tree.
3138
3139 config MIPS_RAW_APPENDED_DTB
3140 bool "vmlinux.bin or vmlinuz.bin"
3141 help
3142 With this option, the boot code will look for a device tree binary
3143 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3144 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3145
3146 This is meant as a backward compatibility convenience for those
3147 systems with a bootloader that can't be upgraded to accommodate
3148 the documented boot protocol using a device tree.
3149
3150 Beware that there is very little in terms of protection against
3151 this option being confused by leftover garbage in memory that might
3152 look like a DTB header after a reboot if no actual DTB is appended
3153 to vmlinux.bin. Do not leave this option active in a production kernel
3154 if you don't intend to always append a DTB.
3155endchoice
3156
3157choice
3158 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3159 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3160 !MACH_LOONGSON64 && !MIPS_MALTA && \
3161 !CAVIUM_OCTEON_SOC
3162 default MIPS_CMDLINE_FROM_BOOTLOADER
3163
3164 config MIPS_CMDLINE_FROM_DTB
3165 depends on USE_OF
3166 bool "Dtb kernel arguments if available"
3167
3168 config MIPS_CMDLINE_DTB_EXTEND
3169 depends on USE_OF
3170 bool "Extend dtb kernel arguments with bootloader arguments"
3171
3172 config MIPS_CMDLINE_FROM_BOOTLOADER
3173 bool "Bootloader kernel arguments if available"
3174
3175 config MIPS_CMDLINE_BUILTIN_EXTEND
3176 depends on CMDLINE_BOOL
3177 bool "Extend builtin kernel arguments with bootloader arguments"
3178endchoice
3179
3180endmenu
3181
3182config LOCKDEP_SUPPORT
3183 bool
3184 default y
3185
3186config STACKTRACE_SUPPORT
3187 bool
3188 default y
3189
3190config PGTABLE_LEVELS
3191 int
3192 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3193 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3194 default 2
3195
3196config MIPS_AUTO_PFN_OFFSET
3197 bool
3198
3199menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3200
3201config PCI_DRIVERS_GENERIC
3202 select PCI_DOMAINS_GENERIC if PCI
3203 bool
3204
3205config PCI_DRIVERS_LEGACY
3206 def_bool !PCI_DRIVERS_GENERIC
3207 select NO_GENERIC_PCI_IOPORT_MAP
3208 select PCI_DOMAINS if PCI
3209
3210#
3211# ISA support is now enabled via select. Too many systems still have the one
3212# or other ISA chip on the board that users don't know about so don't expect
3213# users to choose the right thing ...
3214#
3215config ISA
3216 bool
3217
3218config TC
3219 bool "TURBOchannel support"
3220 depends on MACH_DECSTATION
3221 help
3222 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3223 processors. TURBOchannel programming specifications are available
3224 at:
3225 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3226 and:
3227 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3228 Linux driver support status is documented at:
3229 <http://www.linux-mips.org/wiki/DECstation>
3230
3231config MMU
3232 bool
3233 default y
3234
3235config ARCH_MMAP_RND_BITS_MIN
3236 default 12 if 64BIT
3237 default 8
3238
3239config ARCH_MMAP_RND_BITS_MAX
3240 default 18 if 64BIT
3241 default 15
3242
3243config ARCH_MMAP_RND_COMPAT_BITS_MIN
3244 default 8
3245
3246config ARCH_MMAP_RND_COMPAT_BITS_MAX
3247 default 15
3248
3249config I8253
3250 bool
3251 select CLKSRC_I8253
3252 select CLKEVT_I8253
3253 select MIPS_EXTERNAL_TIMER
3254
3255config ZONE_DMA
3256 bool
3257
3258config ZONE_DMA32
3259 bool
3260
3261endmenu
3262
3263config TRAD_SIGNALS
3264 bool
3265
3266config MIPS32_COMPAT
3267 bool
3268
3269config COMPAT
3270 bool
3271
3272config SYSVIPC_COMPAT
3273 bool
3274
3275config MIPS32_O32
3276 bool "Kernel support for o32 binaries"
3277 depends on 64BIT
3278 select ARCH_WANT_OLD_COMPAT_IPC
3279 select COMPAT
3280 select MIPS32_COMPAT
3281 select SYSVIPC_COMPAT if SYSVIPC
3282 help
3283 Select this option if you want to run o32 binaries. These are pure
3284 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3285 existing binaries are in this format.
3286
3287 If unsure, say Y.
3288
3289config MIPS32_N32
3290 bool "Kernel support for n32 binaries"
3291 depends on 64BIT
3292 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3293 select COMPAT
3294 select MIPS32_COMPAT
3295 select SYSVIPC_COMPAT if SYSVIPC
3296 help
3297 Select this option if you want to run n32 binaries. These are
3298 64-bit binaries using 32-bit quantities for addressing and certain
3299 data that would normally be 64-bit. They are used in special
3300 cases.
3301
3302 If unsure, say N.
3303
3304config BINFMT_ELF32
3305 bool
3306 default y if MIPS32_O32 || MIPS32_N32
3307 select ELFCORE
3308
3309menu "Power management options"
3310
3311config ARCH_HIBERNATION_POSSIBLE
3312 def_bool y
3313 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3314
3315config ARCH_SUSPEND_POSSIBLE
3316 def_bool y
3317 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3318
3319source "kernel/power/Kconfig"
3320
3321endmenu
3322
3323config MIPS_EXTERNAL_TIMER
3324 bool
3325
3326menu "CPU Power Management"
3327
3328if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3329source "drivers/cpufreq/Kconfig"
3330endif
3331
3332source "drivers/cpuidle/Kconfig"
3333
3334endmenu
3335
3336source "drivers/firmware/Kconfig"
3337
3338source "arch/mips/kvm/Kconfig"
3339
3340source "arch/mips/vdso/Kconfig"
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-04-16 09:45:11 +0800