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author | 2025-03-08 22:04:20 +0800 | |
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committer | 2025-03-08 22:04:20 +0800 | |
commit | a07bb8fd1299070229f0e8f3dcb57ffd5ef9870a (patch) | |
tree | 84f21bd0bf7071bc5fc7dd989e77d7ceb5476682 /arch/mips/ath25/early_printk.c | |
download | ohosKernel-a07bb8fd1299070229f0e8f3dcb57ffd5ef9870a.tar.gz ohosKernel-a07bb8fd1299070229f0e8f3dcb57ffd5ef9870a.zip |
Initial commit: OpenHarmony-v4.0-ReleaseOpenHarmony-v4.0-Release
Diffstat (limited to 'arch/mips/ath25/early_printk.c')
-rw-r--r-- | arch/mips/ath25/early_printk.c | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/mips/ath25/early_printk.c b/arch/mips/ath25/early_printk.c new file mode 100644 index 000000000..d534761e9 --- /dev/null +++ b/arch/mips/ath25/early_printk.c | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org> | ||
7 | */ | ||
8 | |||
9 | #include <linux/mm.h> | ||
10 | #include <linux/io.h> | ||
11 | #include <linux/serial_reg.h> | ||
12 | #include <asm/setup.h> | ||
13 | |||
14 | #include "devices.h" | ||
15 | #include "ar2315_regs.h" | ||
16 | #include "ar5312_regs.h" | ||
17 | |||
18 | static inline void prom_uart_wr(void __iomem *base, unsigned reg, | ||
19 | unsigned char ch) | ||
20 | { | ||
21 | __raw_writel(ch, base + 4 * reg); | ||
22 | } | ||
23 | |||
24 | static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg) | ||
25 | { | ||
26 | return __raw_readl(base + 4 * reg); | ||
27 | } | ||
28 | |||
29 | void prom_putchar(char ch) | ||
30 | { | ||
31 | static void __iomem *base; | ||
32 | |||
33 | if (unlikely(base == NULL)) { | ||
34 | if (is_ar2315()) | ||
35 | base = (void __iomem *)(KSEG1ADDR(AR2315_UART0_BASE)); | ||
36 | else | ||
37 | base = (void __iomem *)(KSEG1ADDR(AR5312_UART0_BASE)); | ||
38 | } | ||
39 | |||
40 | while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0) | ||
41 | ; | ||
42 | prom_uart_wr(base, UART_TX, (unsigned char)ch); | ||
43 | while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0) | ||
44 | ; | ||
45 | } | ||