Initial commit: OpenHarmony-v4.0-ReleaseOpenHarmony-v4.0-Release

1 files changed, 228 insertions, 0 deletions

diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
new file mode 100644
index 000000000..09fa4705c
--- /dev/null
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -0,0 +1,228 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#include <asm/asm-offsets.h>
+#include <asm/thread_info.h>
+
+#define PAGE_SIZE _PAGE_SIZE
+
+/*
+ * Put .bss..swapper_pg_dir as the first thing in .bss. This will
+ * ensure that it has .bss alignment (64K).
+ */
+#define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
+
+/* Cavium Octeon should not have a separate PT_NOTE Program Header. */
+#ifndef CONFIG_CAVIUM_OCTEON_SOC
+#define EMITS_PT_NOTE
+#endif
+
+#include <asm-generic/vmlinux.lds.h>
+
+#undef mips
+#define mips mips
+OUTPUT_ARCH(mips)
+ENTRY(kernel_entry)
+PHDRS {
+        text PT_LOAD FLAGS(7);  /* RWX */
+#ifndef CONFIG_CAVIUM_OCTEON_SOC
+        note PT_NOTE FLAGS(4);  /* R__ */
+#endif /* CAVIUM_OCTEON_SOC */
+}
+
+#ifdef CONFIG_32BIT
+        #ifdef CONFIG_CPU_LITTLE_ENDIAN
+                jiffies  = jiffies_64;
+        #else
+                jiffies  = jiffies_64 + 4;
+        #endif
+#else
+        jiffies  = jiffies_64;
+#endif
+
+SECTIONS
+{
+#ifdef CONFIG_BOOT_ELF64
+        /* Read-only sections, merged into text segment: */
+        /* . = 0xc000000000000000; */
+
+        /* This is the value for an Origin kernel, taken from an IRIX kernel.  */
+        /* . = 0xc00000000001c000; */
+
+        /* Set the vaddr for the text segment to a value
+         *   >= 0xa800 0000 0001 9000 if no symmon is going to configured
+         *   >= 0xa800 0000 0030 0000 otherwise
+         */
+
+        /* . = 0xa800000000300000; */
+        . = 0xffffffff80300000;
+#endif
+        . = LINKER_LOAD_ADDRESS;
+        /* read-only */
+        _text = .;      /* Text and read-only data */
+        .text : {
+                TEXT_TEXT
+                SCHED_TEXT
+                CPUIDLE_TEXT
+                LOCK_TEXT
+                KPROBES_TEXT
+                IRQENTRY_TEXT
+                SOFTIRQENTRY_TEXT
+                *(.text.*)
+                *(.fixup)
+                *(.gnu.warning)
+        } :text = 0
+        _etext = .;     /* End of text section */
+
+        EXCEPTION_TABLE(16)
+
+        /* Exception table for data bus errors */
+        __dbe_table : {
+                __start___dbe_table = .;
+                KEEP(*(__dbe_table))
+                __stop___dbe_table = .;
+        }
+
+        _sdata = .;                     /* Start of data section */
+        RO_DATA(4096)
+
+        /* writeable */
+        .data : {       /* Data */
+                . = . + DATAOFFSET;             /* for CONFIG_MAPPED_KERNEL */
+
+                INIT_TASK_DATA(THREAD_SIZE)
+                NOSAVE_DATA
+                PAGE_ALIGNED_DATA(PAGE_SIZE)
+                CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
+                READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
+                DATA_DATA
+                CONSTRUCTORS
+        }
+        BUG_TABLE
+        _gp = . + 0x8000;
+        .lit8 : {
+                *(.lit8)
+        }
+        .lit4 : {
+                *(.lit4)
+        }
+        /* We want the small data sections together, so single-instruction offsets
+           can access them all, and initialized data all before uninitialized, so
+           we can shorten the on-disk segment size.  */
+        .sdata : {
+                *(.sdata)
+        }
+        _edata =  .;                    /* End of data section */
+
+        /* will be freed after init */
+        . = ALIGN(PAGE_SIZE);           /* Init code and data */
+        __init_begin = .;
+        INIT_TEXT_SECTION(PAGE_SIZE)
+        INIT_DATA_SECTION(16)
+
+        . = ALIGN(4);
+        .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
+                __mips_machines_start = .;
+                KEEP(*(.mips.machines.init))
+                __mips_machines_end = .;
+        }
+
+        /* .exit.text is discarded at runtime, not link time, to deal with
+         * references from .rodata
+         */
+        .exit.text : {
+                EXIT_TEXT
+        }
+        .exit.data : {
+                EXIT_DATA
+        }
+#ifdef CONFIG_SMP
+        PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
+#endif
+
+#ifdef CONFIG_MIPS_ELF_APPENDED_DTB
+        .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
+                *(.appended_dtb)
+                KEEP(*(.appended_dtb))
+        }
+#endif
+
+#ifdef CONFIG_RELOCATABLE
+        . = ALIGN(4);
+
+        .data.reloc : {
+                _relocation_start = .;
+                /*
+                 * Space for relocation table
+                 * This needs to be filled so that the
+                 * relocs tool can overwrite the content.
+                 * An invalid value is left at the start of the
+                 * section to abort relocation if the table
+                 * has not been filled in.
+                 */
+                LONG(0xFFFFFFFF);
+                FILL(0);
+                . += CONFIG_RELOCATION_TABLE_SIZE - 4;
+                _relocation_end = .;
+        }
+#endif
+
+#ifdef CONFIG_MIPS_RAW_APPENDED_DTB
+        __appended_dtb = .;
+        /* leave space for appended DTB */
+        . += 0x100000;
+#endif
+        /*
+         * Align to 64K in attempt to eliminate holes before the
+         * .bss..swapper_pg_dir section at the start of .bss.  This
+         * also satisfies PAGE_SIZE alignment as the largest page size
+         * allowed is 64K.
+         */
+        . = ALIGN(0x10000);
+        __init_end = .;
+        /* freed after init ends here */
+
+        /*
+         * Force .bss to 64K alignment so that .bss..swapper_pg_dir
+         * gets that alignment.  .sbss should be empty, so there will be
+         * no holes after __init_end. */
+        BSS_SECTION(0, 0x10000, 8)
+
+        _end = . ;
+
+        /* These mark the ABI of the kernel for debuggers.  */
+        .mdebug.abi32 : {
+                KEEP(*(.mdebug.abi32))
+        }
+        .mdebug.abi64 : {
+                KEEP(*(.mdebug.abi64))
+        }
+
+        /* This is the MIPS specific mdebug section.  */
+        .mdebug : {
+                *(.mdebug)
+        }
+
+        STABS_DEBUG
+        DWARF_DEBUG
+        ELF_DETAILS
+
+        /* These must appear regardless of  .  */
+        .gptab.sdata : {
+                *(.gptab.data)
+                *(.gptab.sdata)
+        }
+        .gptab.sbss : {
+                *(.gptab.bss)
+                *(.gptab.sbss)
+        }
+
+        /* Sections to be discarded */
+        DISCARDS
+        /DISCARD/ : {
+                /* ABI crap starts here */
+                *(.MIPS.abiflags)
+                *(.MIPS.options)
+                *(.options)
+                *(.pdr)
+                *(.reginfo)
+        }
+}