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-rw-r--r--arch/mips/boot/dts/ingenic/jz4770.dtsi471
1 files changed, 471 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi
new file mode 100644
index 000000000..018721a9e
--- /dev/null
+++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi
@@ -0,0 +1,471 @@
1// SPDX-License-Identifier: GPL-2.0
2#include <dt-bindings/clock/jz4770-cgu.h>
3#include <dt-bindings/clock/ingenic,tcu.h>
4
5/ {
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4770";
9
10 cpus {
11 #address-cells = <1>;
12 #size-cells = <0>;
13
14 cpu0: cpu@0 {
15 device_type = "cpu";
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
17 reg = <0>;
18
19 clocks = <&cgu JZ4770_CLK_CCLK>;
20 clock-names = "cpu";
21 };
22 };
23
24 cpuintc: interrupt-controller {
25 #address-cells = <0>;
26 #interrupt-cells = <1>;
27 interrupt-controller;
28 compatible = "mti,cpu-interrupt-controller";
29 };
30
31 intc: interrupt-controller@10001000 {
32 compatible = "ingenic,jz4770-intc";
33 reg = <0x10001000 0x40>;
34
35 interrupt-controller;
36 #interrupt-cells = <1>;
37
38 interrupt-parent = <&cpuintc>;
39 interrupts = <2>;
40 };
41
42 ext: ext {
43 compatible = "fixed-clock";
44 #clock-cells = <0>;
45 };
46
47 osc32k: osc32k {
48 compatible = "fixed-clock";
49 #clock-cells = <0>;
50 clock-frequency = <32768>;
51 };
52
53 cgu: jz4770-cgu@10000000 {
54 compatible = "ingenic,jz4770-cgu", "simple-mfd";
55 reg = <0x10000000 0x100>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges = <0x0 0x10000000 0x100>;
59
60 clocks = <&ext>, <&osc32k>;
61 clock-names = "ext", "osc32k";
62
63 #clock-cells = <1>;
64
65 otg_phy: usb-phy@3c {
66 compatible = "ingenic,jz4770-phy";
67 reg = <0x3c 0x10>;
68
69 clocks = <&cgu JZ4770_CLK_OTG_PHY>;
70
71 #phy-cells = <0>;
72 };
73 };
74
75 tcu: timer@10002000 {
76 compatible = "ingenic,jz4770-tcu", "simple-mfd";
77 reg = <0x10002000 0x1000>;
78 #address-cells = <1>;
79 #size-cells = <1>;
80 ranges = <0x0 0x10002000 0x1000>;
81
82 #clock-cells = <1>;
83
84 clocks = <&cgu JZ4770_CLK_RTC>,
85 <&cgu JZ4770_CLK_EXT>,
86 <&cgu JZ4770_CLK_PCLK>;
87 clock-names = "rtc", "ext", "pclk";
88
89 interrupt-controller;
90 #interrupt-cells = <1>;
91
92 interrupt-parent = <&intc>;
93 interrupts = <27 26 25>;
94
95 watchdog: watchdog@0 {
96 compatible = "ingenic,jz4770-watchdog",
97 "ingenic,jz4740-watchdog";
98 reg = <0x0 0xc>;
99
100 clocks = <&tcu TCU_CLK_WDT>;
101 clock-names = "wdt";
102 };
103
104 pwm: pwm@40 {
105 compatible = "ingenic,jz4770-pwm", "ingenic,jz4740-pwm";
106 reg = <0x40 0x80>;
107
108 #pwm-cells = <3>;
109
110 clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
111 <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_TIMER3>,
112 <&tcu TCU_CLK_TIMER4>, <&tcu TCU_CLK_TIMER5>,
113 <&tcu TCU_CLK_TIMER6>, <&tcu TCU_CLK_TIMER7>;
114 clock-names = "timer0", "timer1", "timer2", "timer3",
115 "timer4", "timer5", "timer6", "timer7";
116 };
117
118 ost: timer@e0 {
119 compatible = "ingenic,jz4770-ost";
120 reg = <0xe0 0x20>;
121
122 clocks = <&tcu TCU_CLK_OST>;
123 clock-names = "ost";
124
125 interrupts = <15>;
126 };
127 };
128
129 rtc: rtc@10003000 {
130 compatible = "ingenic,jz4770-rtc", "ingenic,jz4760-rtc";
131 reg = <0x10003000 0x40>;
132
133 interrupt-parent = <&intc>;
134 interrupts = <32>;
135 };
136
137 pinctrl: pin-controller@10010000 {
138 compatible = "ingenic,jz4770-pinctrl";
139 reg = <0x10010000 0x600>;
140
141 #address-cells = <1>;
142 #size-cells = <0>;
143
144 gpa: gpio@0 {
145 compatible = "ingenic,jz4770-gpio";
146 reg = <0>;
147
148 gpio-controller;
149 gpio-ranges = <&pinctrl 0 0 32>;
150 #gpio-cells = <2>;
151
152 interrupt-controller;
153 #interrupt-cells = <2>;
154
155 interrupt-parent = <&intc>;
156 interrupts = <17>;
157 };
158
159 gpb: gpio@1 {
160 compatible = "ingenic,jz4770-gpio";
161 reg = <1>;
162
163 gpio-controller;
164 gpio-ranges = <&pinctrl 0 32 32>;
165 #gpio-cells = <2>;
166
167 interrupt-controller;
168 #interrupt-cells = <2>;
169
170 interrupt-parent = <&intc>;
171 interrupts = <16>;
172 };
173
174 gpc: gpio@2 {
175 compatible = "ingenic,jz4770-gpio";
176 reg = <2>;
177
178 gpio-controller;
179 gpio-ranges = <&pinctrl 0 64 32>;
180 #gpio-cells = <2>;
181
182 interrupt-controller;
183 #interrupt-cells = <2>;
184
185 interrupt-parent = <&intc>;
186 interrupts = <15>;
187 };
188
189 gpd: gpio@3 {
190 compatible = "ingenic,jz4770-gpio";
191 reg = <3>;
192
193 gpio-controller;
194 gpio-ranges = <&pinctrl 0 96 32>;
195 #gpio-cells = <2>;
196
197 interrupt-controller;
198 #interrupt-cells = <2>;
199
200 interrupt-parent = <&intc>;
201 interrupts = <14>;
202 };
203
204 gpe: gpio@4 {
205 compatible = "ingenic,jz4770-gpio";
206 reg = <4>;
207
208 gpio-controller;
209 gpio-ranges = <&pinctrl 0 128 32>;
210 #gpio-cells = <2>;
211
212 interrupt-controller;
213 #interrupt-cells = <2>;
214
215 interrupt-parent = <&intc>;
216 interrupts = <13>;
217 };
218
219 gpf: gpio@5 {
220 compatible = "ingenic,jz4770-gpio";
221 reg = <5>;
222
223 gpio-controller;
224 gpio-ranges = <&pinctrl 0 160 32>;
225 #gpio-cells = <2>;
226
227 interrupt-controller;
228 #interrupt-cells = <2>;
229
230 interrupt-parent = <&intc>;
231 interrupts = <12>;
232 };
233 };
234
235 aic: audio-controller@10020000 {
236 compatible = "ingenic,jz4770-i2s";
237 reg = <0x10020000 0x94>;
238
239 #sound-dai-cells = <0>;
240
241 clocks = <&cgu JZ4770_CLK_AIC>, <&cgu JZ4770_CLK_I2S>,
242 <&cgu JZ4770_CLK_EXT>, <&cgu JZ4770_CLK_PLL0>;
243 clock-names = "aic", "i2s", "ext", "pll half";
244
245 interrupt-parent = <&intc>;
246 interrupts = <34>;
247
248 dmas = <&dmac0 25 0xffffffff>, <&dmac0 24 0xffffffff>;
249 dma-names = "rx", "tx";
250 };
251
252 codec: audio-codec@100200a0 {
253 compatible = "ingenic,jz4770-codec";
254 reg = <0x100200a4 0x8>;
255
256 #sound-dai-cells = <0>;
257
258 clocks = <&cgu JZ4770_CLK_AIC>;
259 clock-names = "aic";
260 };
261
262 mmc0: mmc@10021000 {
263 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
264 reg = <0x10021000 0x1000>;
265
266 clocks = <&cgu JZ4770_CLK_MMC0>;
267 clock-names = "mmc";
268
269 interrupt-parent = <&intc>;
270 interrupts = <37>;
271
272 dmas = <&dmac1 27 0xffffffff>, <&dmac1 26 0xffffffff>;
273 dma-names = "rx", "tx";
274
275 cap-sd-highspeed;
276 cap-mmc-highspeed;
277 cap-sdio-irq;
278
279 status = "disabled";
280 };
281
282 mmc1: mmc@10022000 {
283 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
284 reg = <0x10022000 0x1000>;
285
286 clocks = <&cgu JZ4770_CLK_MMC1>;
287 clock-names = "mmc";
288
289 interrupt-parent = <&intc>;
290 interrupts = <36>;
291
292 dmas = <&dmac1 31 0xffffffff>, <&dmac1 30 0xffffffff>;
293 dma-names = "rx", "tx";
294
295 cap-sd-highspeed;
296 cap-mmc-highspeed;
297 cap-sdio-irq;
298
299 status = "disabled";
300 };
301
302 mmc2: mmc@10023000 {
303 compatible = "ingenic,jz4770-mmc", "ingenic,jz4760-mmc";
304 reg = <0x10023000 0x1000>;
305
306 clocks = <&cgu JZ4770_CLK_MMC2>;
307 clock-names = "mmc";
308
309 interrupt-parent = <&intc>;
310 interrupts = <35>;
311
312 dmas = <&dmac1 37 0xffffffff>, <&dmac1 36 0xffffffff>;
313 dma-names = "rx", "tx";
314
315 cap-sd-highspeed;
316 cap-mmc-highspeed;
317 cap-sdio-irq;
318
319 status = "disabled";
320 };
321
322 uart0: serial@10030000 {
323 compatible = "ingenic,jz4770-uart";
324 reg = <0x10030000 0x100>;
325
326 clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
327 clock-names = "baud", "module";
328
329 interrupt-parent = <&intc>;
330 interrupts = <5>;
331
332 status = "disabled";
333 };
334
335 uart1: serial@10031000 {
336 compatible = "ingenic,jz4770-uart";
337 reg = <0x10031000 0x100>;
338
339 clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
340 clock-names = "baud", "module";
341
342 interrupt-parent = <&intc>;
343 interrupts = <4>;
344
345 status = "disabled";
346 };
347
348 uart2: serial@10032000 {
349 compatible = "ingenic,jz4770-uart";
350 reg = <0x10032000 0x100>;
351
352 clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
353 clock-names = "baud", "module";
354
355 interrupt-parent = <&intc>;
356 interrupts = <3>;
357
358 status = "disabled";
359 };
360
361 uart3: serial@10033000 {
362 compatible = "ingenic,jz4770-uart";
363 reg = <0x10033000 0x100>;
364
365 clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
366 clock-names = "baud", "module";
367
368 interrupt-parent = <&intc>;
369 interrupts = <2>;
370
371 status = "disabled";
372 };
373
374 adc: adc@10070000 {
375 compatible = "ingenic,jz4770-adc";
376 reg = <0x10070000 0x30>;
377
378 #io-channel-cells = <1>;
379
380 clocks = <&cgu JZ4770_CLK_ADC>;
381 clock-names = "adc";
382
383 interrupt-parent = <&intc>;
384 interrupts = <18>;
385 };
386
387 gpu: gpu@13040000 {
388 compatible = "vivante,gc";
389 reg = <0x13040000 0x10000>;
390
391 clocks = <&cgu JZ4770_CLK_GPU>,
392 <&cgu JZ4770_CLK_GPU>,
393 <&cgu JZ4770_CLK_GPU>;
394 clock-names = "bus", "core", "shader";
395
396 interrupt-parent = <&intc>;
397 interrupts = <6>;
398 };
399
400 lcd: lcd-controller@13050000 {
401 compatible = "ingenic,jz4770-lcd";
402 reg = <0x13050000 0x300>;
403
404 interrupt-parent = <&intc>;
405 interrupts = <31>;
406
407 clocks = <&cgu JZ4770_CLK_LPCLK_MUX>;
408 clock-names = "lcd_pclk";
409 };
410
411 dmac0: dma-controller@13420000 {
412 compatible = "ingenic,jz4770-dma";
413 reg = <0x13420000 0xC0>, <0x13420300 0x20>;
414
415 #dma-cells = <2>;
416
417 clocks = <&cgu JZ4770_CLK_DMA>;
418 interrupt-parent = <&intc>;
419 interrupts = <24>;
420 };
421
422 dmac1: dma-controller@13420100 {
423 compatible = "ingenic,jz4770-dma";
424 reg = <0x13420100 0xC0>, <0x13420400 0x20>;
425
426 #dma-cells = <2>;
427
428 clocks = <&cgu JZ4770_CLK_DMA>;
429 interrupt-parent = <&intc>;
430 interrupts = <23>;
431 };
432
433 uhc: uhc@13430000 {
434 compatible = "generic-ohci";
435 reg = <0x13430000 0x1000>;
436
437 clocks = <&cgu JZ4770_CLK_UHC>, <&cgu JZ4770_CLK_UHC_PHY>;
438 assigned-clocks = <&cgu JZ4770_CLK_UHC>;
439 assigned-clock-rates = <48000000>;
440
441 interrupt-parent = <&intc>;
442 interrupts = <20>;
443
444 status = "disabled";
445 };
446
447 usb_otg: usb@13440000 {
448 compatible = "ingenic,jz4770-musb";
449 reg = <0x13440000 0x10000>;
450
451 clocks = <&cgu JZ4770_CLK_OTG>;
452 clock-names = "udc";
453
454 interrupt-parent = <&intc>;
455 interrupts = <21>;
456 interrupt-names = "mc";
457
458 phys = <&otg_phy>;
459
460 usb-role-switch;
461 };
462
463 rom: memory@1fc00000 {
464 compatible = "mtd-rom";
465 probe-type = "map_rom";
466 reg = <0x1fc00000 0x2000>;
467
468 bank-width = <4>;
469 device-width = <1>;
470 };
471};
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-04-17 23:53:45 +0800