diff options
Diffstat (limited to 'arch/mips/boot/dts/lantiq/danube.dtsi')
-rw-r--r-- | arch/mips/boot/dts/lantiq/danube.dtsi | 106 |
1 files changed, 106 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/lantiq/danube.dtsi b/arch/mips/boot/dts/lantiq/danube.dtsi new file mode 100644 index 000000000..510be63c8 --- /dev/null +++ b/arch/mips/boot/dts/lantiq/danube.dtsi | |||
@@ -0,0 +1,106 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | / { | ||
3 | #address-cells = <1>; | ||
4 | #size-cells = <1>; | ||
5 | compatible = "lantiq,xway", "lantiq,danube"; | ||
6 | |||
7 | cpus { | ||
8 | cpu@0 { | ||
9 | compatible = "mips,mips24Kc"; | ||
10 | }; | ||
11 | }; | ||
12 | |||
13 | biu@1f800000 { | ||
14 | #address-cells = <1>; | ||
15 | #size-cells = <1>; | ||
16 | compatible = "lantiq,biu", "simple-bus"; | ||
17 | reg = <0x1f800000 0x800000>; | ||
18 | ranges = <0x0 0x1f800000 0x7fffff>; | ||
19 | |||
20 | icu0: icu@80200 { | ||
21 | #interrupt-cells = <1>; | ||
22 | interrupt-controller; | ||
23 | compatible = "lantiq,icu"; | ||
24 | reg = <0x80200 0x120>; | ||
25 | }; | ||
26 | |||
27 | watchdog@803f0 { | ||
28 | compatible = "lantiq,wdt"; | ||
29 | reg = <0x803f0 0x10>; | ||
30 | }; | ||
31 | }; | ||
32 | |||
33 | sram@1f000000 { | ||
34 | #address-cells = <1>; | ||
35 | #size-cells = <1>; | ||
36 | compatible = "lantiq,sram"; | ||
37 | reg = <0x1f000000 0x800000>; | ||
38 | ranges = <0x0 0x1f000000 0x7fffff>; | ||
39 | |||
40 | eiu0: eiu@101000 { | ||
41 | #interrupt-cells = <1>; | ||
42 | interrupt-controller; | ||
43 | interrupt-parent; | ||
44 | compatible = "lantiq,eiu-xway"; | ||
45 | reg = <0x101000 0x1000>; | ||
46 | }; | ||
47 | |||
48 | pmu0: pmu@102000 { | ||
49 | compatible = "lantiq,pmu-xway"; | ||
50 | reg = <0x102000 0x1000>; | ||
51 | }; | ||
52 | |||
53 | cgu0: cgu@103000 { | ||
54 | compatible = "lantiq,cgu-xway"; | ||
55 | reg = <0x103000 0x1000>; | ||
56 | #clock-cells = <1>; | ||
57 | }; | ||
58 | |||
59 | rcu0: rcu@203000 { | ||
60 | compatible = "lantiq,rcu-xway"; | ||
61 | reg = <0x203000 0x1000>; | ||
62 | }; | ||
63 | }; | ||
64 | |||
65 | fpi@10000000 { | ||
66 | #address-cells = <1>; | ||
67 | #size-cells = <1>; | ||
68 | compatible = "lantiq,fpi", "simple-bus"; | ||
69 | ranges = <0x0 0x10000000 0xeefffff>; | ||
70 | reg = <0x10000000 0xef00000>; | ||
71 | |||
72 | gptu@e100a00 { | ||
73 | compatible = "lantiq,gptu-xway"; | ||
74 | reg = <0xe100a00 0x100>; | ||
75 | }; | ||
76 | |||
77 | serial@e100c00 { | ||
78 | compatible = "lantiq,asc"; | ||
79 | reg = <0xe100c00 0x400>; | ||
80 | interrupt-parent = <&icu0>; | ||
81 | interrupts = <112 113 114>; | ||
82 | }; | ||
83 | |||
84 | dma0: dma@e104100 { | ||
85 | compatible = "lantiq,dma-xway"; | ||
86 | reg = <0xe104100 0x800>; | ||
87 | }; | ||
88 | |||
89 | ebu0: ebu@e105300 { | ||
90 | compatible = "lantiq,ebu-xway"; | ||
91 | reg = <0xe105300 0x100>; | ||
92 | }; | ||
93 | |||
94 | pci0: pci@e105400 { | ||
95 | #address-cells = <3>; | ||
96 | #size-cells = <2>; | ||
97 | #interrupt-cells = <1>; | ||
98 | compatible = "lantiq,pci-xway"; | ||
99 | bus-range = <0x0 0x0>; | ||
100 | ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ | ||
101 | 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */ | ||
102 | reg = <0x7000000 0x8000 /* config space */ | ||
103 | 0xe105400 0x400>; /* pci bridge */ | ||
104 | }; | ||
105 | }; | ||
106 | }; | ||