1 files changed, 64 insertions, 0 deletions

diff --git a/arch/mips/boot/dts/loongson/loongson64c-package.dtsi b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
new file mode 100644
index 000000000..5bb876a4d
--- /dev/null
+++ b/arch/mips/boot/dts/loongson/loongson64c-package.dtsi
@@ -0,0 +1,64 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        cpuintc: interrupt-controller {
+                #address-cells = <0>;
+                #interrupt-cells = <1>;
+                interrupt-controller;
+                compatible = "mti,cpu-interrupt-controller";
+        };
+
+        package0: bus@1fe00000 {
+                compatible = "simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges = <0 0x1fe00000 0 0x1fe00000 0x100000
+                        0 0x3ff00000 0 0x3ff00000 0x100000
+                        /* 3A HT Config Space */
+                        0xefd 0xfb000000 0xefd 0xfb000000 0x10000000
+                        /* 3B HT Config Space */
+                        0x1efd 0xfb000000 0x1efd 0xfb000000 0x10000000>;
+
+                liointc: interrupt-controller@3ff01400 {
+                        compatible = "loongson,liointc-1.0";
+                        reg = <0 0x3ff01400 0x64>;
+
+                        interrupt-controller;
+                        #interrupt-cells = <2>;
+
+                        interrupt-parent = <&cpuintc>;
+                        interrupts = <2>, <3>;
+                        interrupt-names = "int0", "int1";
+
+                        loongson,parent_int_map = <0xf0ffffff>, /* int0 */
+                                                <0x0f000000>, /* int1 */
+                                                <0x00000000>, /* int2 */
+                                                <0x00000000>; /* int3 */
+
+                };
+
+                cpu_uart0: serial@1fe001e0 {
+                        compatible = "ns16550a";
+                        reg = <0 0x1fe001e0 0x8>;
+                        clock-frequency = <33000000>;
+                        interrupt-parent = <&liointc>;
+                        interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+                        no-loopback-test;
+                };
+
+                cpu_uart1: serial@1fe001e8 {
+                        status = "disabled";
+                        compatible = "ns16550a";
+                        reg = <0 0x1fe001e8 0x8>;
+                        clock-frequency = <33000000>;
+                        interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupt-parent = <&liointc>;
+                        no-loopback-test;
+                };
+        };
+};