aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/mips/boot/dts/loongson/ls7a-pch.dtsi')
-rw-r--r--arch/mips/boot/dts/loongson/ls7a-pch.dtsi417
1 files changed, 417 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/loongson/ls7a-pch.dtsi b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
new file mode 100644
index 000000000..f99a7a11f
--- /dev/null
+++ b/arch/mips/boot/dts/loongson/ls7a-pch.dtsi
@@ -0,0 +1,417 @@
1// SPDX-License-Identifier: GPL-2.0
2
3/ {
4 pch: bus@10000000 {
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
8 ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
9 0 0x20000000 0 0x20000000 0 0x10000000
10 0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
11 0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
12
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.0";
15 reg = <0 0x10000000 0 0x400>;
16 interrupt-controller;
17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec = <0>;
19 #interrupt-cells = <2>;
20 };
21
22 ls7a_uart0: serial@10080000 {
23 compatible = "ns16550a";
24 reg = <0 0x10080000 0 0x100>;
25 clock-frequency = <50000000>;
26 interrupt-parent = <&pic>;
27 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
28 no-loopback-test;
29 };
30
31 ls7a_uart1: serial@10080100 {
32 status = "disabled";
33 compatible = "ns16550a";
34 reg = <0 0x10080100 0 0x100>;
35 clock-frequency = <50000000>;
36 interrupt-parent = <&pic>;
37 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
38 no-loopback-test;
39 };
40
41 ls7a_uart2: serial@10080200 {
42 status = "disabled";
43 compatible = "ns16550a";
44 reg = <0 0x10080200 0 0x100>;
45 clock-frequency = <50000000>;
46 interrupt-parent = <&pic>;
47 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
48 no-loopback-test;
49 };
50
51 ls7a_uart3: serial@10080300 {
52 status = "disabled";
53 compatible = "ns16550a";
54 reg = <0 0x10080300 0 0x100>;
55 clock-frequency = <50000000>;
56 interrupt-parent = <&pic>;
57 interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
58 no-loopback-test;
59 };
60
61 pci@1a000000 {
62 compatible = "loongson,ls7a-pci";
63 device_type = "pci";
64 #address-cells = <3>;
65 #size-cells = <2>;
66 #interrupt-cells = <2>;
67 msi-parent = <&msi>;
68
69 reg = <0 0x1a000000 0 0x02000000>,
70 <0xefe 0x00000000 0 0x20000000>;
71
72 ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
73 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
74
75 ohci@4,0 {
76 compatible = "pci0014,7a24.0",
77 "pci0014,7a24",
78 "pciclass0c0310",
79 "pciclass0c03";
80
81 reg = <0x2000 0x0 0x0 0x0 0x0>;
82 interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
83 interrupt-parent = <&pic>;
84 };
85
86 ehci@4,1 {
87 compatible = "pci0014,7a14.0",
88 "pci0014,7a14",
89 "pciclass0c0320",
90 "pciclass0c03";
91
92 reg = <0x2100 0x0 0x0 0x0 0x0>;
93 interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
94 interrupt-parent = <&pic>;
95 };
96
97 ohci@5,0 {
98 compatible = "pci0014,7a24.0",
99 "pci0014,7a24",
100 "pciclass0c0310",
101 "pciclass0c03";
102
103 reg = <0x2800 0x0 0x0 0x0 0x0>;
104 interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
105 interrupt-parent = <&pic>;
106 };
107
108 ehci@5,1 {
109 compatible = "pci0014,7a14.0",
110 "pci0014,7a14",
111 "pciclass0c0320",
112 "pciclass0c03";
113
114 reg = <0x2900 0x0 0x0 0x0 0x0>;
115 interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
116 interrupt-parent = <&pic>;
117 };
118
119 sata@8,0 {
120 compatible = "pci0014,7a08.0",
121 "pci0014,7a08",
122 "pciclass010601",
123 "pciclass0106";
124
125 reg = <0x4000 0x0 0x0 0x0 0x0>;
126 interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
127 interrupt-parent = <&pic>;
128 };
129
130 sata@8,1 {
131 compatible = "pci0014,7a08.0",
132 "pci0014,7a08",
133 "pciclass010601",
134 "pciclass0106";
135
136 reg = <0x4100 0x0 0x0 0x0 0x0>;
137 interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
138 interrupt-parent = <&pic>;
139 };
140
141 sata@8,2 {
142 compatible = "pci0014,7a08.0",
143 "pci0014,7a08",
144 "pciclass010601",
145 "pciclass0106";
146
147 reg = <0x4200 0x0 0x0 0x0 0x0>;
148 interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
149 interrupt-parent = <&pic>;
150 };
151
152 gpu@6,0 {
153 compatible = "pci0014,7a15.0",
154 "pci0014,7a15",
155 "pciclass030200",
156 "pciclass0302";
157
158 reg = <0x3000 0x0 0x0 0x0 0x0>;
159 interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
160 interrupt-parent = <&pic>;
161 };
162
163 dc@6,1 {
164 compatible = "pci0014,7a06.0",
165 "pci0014,7a06",
166 "pciclass030000",
167 "pciclass0300";
168
169 reg = <0x3100 0x0 0x0 0x0 0x0>;
170 interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
171 interrupt-parent = <&pic>;
172 };
173
174 hda@7,0 {
175 compatible = "pci0014,7a07.0",
176 "pci0014,7a07",
177 "pciclass040300",
178 "pciclass0403";
179
180 reg = <0x3800 0x0 0x0 0x0 0x0>;
181 interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
182 interrupt-parent = <&pic>;
183 };
184
185 gmac@3,0 {
186 compatible = "pci0014,7a03.0",
187 "pci0014,7a03",
188 "pciclass020000",
189 "pciclass0200";
190
191 reg = <0x1800 0x0 0x0 0x0 0x0>;
192 interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
193 <13 IRQ_TYPE_LEVEL_HIGH>;
194 interrupt-names = "macirq", "eth_lpi";
195 interrupt-parent = <&pic>;
196 phy-mode = "rgmii";
197 mdio {
198 #address-cells = <1>;
199 #size-cells = <0>;
200 compatible = "snps,dwmac-mdio";
201 phy0: ethernet-phy@0 {
202 reg = <0>;
203 };
204 };
205 };
206
207 gmac@3,1 {
208 compatible = "pci0014,7a03.0",
209 "pci0014,7a03",
210 "pciclass020000",
211 "pciclass0200";
212
213 reg = <0x1900 0x0 0x0 0x0 0x0>;
214 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
215 <15 IRQ_TYPE_LEVEL_HIGH>;
216 interrupt-names = "macirq", "eth_lpi";
217 interrupt-parent = <&pic>;
218 phy-mode = "rgmii";
219 mdio {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "snps,dwmac-mdio";
223 phy1: ethernet-phy@1 {
224 reg = <0>;
225 };
226 };
227 };
228
229 pci_bridge@9,0 {
230 compatible = "pci0014,7a19.1",
231 "pci0014,7a19",
232 "pciclass060400",
233 "pciclass0604";
234
235 reg = <0x4800 0x0 0x0 0x0 0x0>;
236 interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
237 interrupt-parent = <&pic>;
238
239 #interrupt-cells = <1>;
240 interrupt-map-mask = <0 0 0 0>;
241 interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
242 };
243
244 pci_bridge@a,0 {
245 compatible = "pci0014,7a09.1",
246 "pci0014,7a09",
247 "pciclass060400",
248 "pciclass0604";
249
250 reg = <0x5000 0x0 0x0 0x0 0x0>;
251 interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
252 interrupt-parent = <&pic>;
253
254 #interrupt-cells = <1>;
255 interrupt-map-mask = <0 0 0 0>;
256 interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
257 };
258
259 pci_bridge@b,0 {
260 compatible = "pci0014,7a09.1",
261 "pci0014,7a09",
262 "pciclass060400",
263 "pciclass0604";
264
265 reg = <0x5800 0x0 0x0 0x0 0x0>;
266 interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
267 interrupt-parent = <&pic>;
268
269 #interrupt-cells = <1>;
270 interrupt-map-mask = <0 0 0 0>;
271 interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
272 };
273
274 pci_bridge@c,0 {
275 compatible = "pci0014,7a09.1",
276 "pci0014,7a09",
277 "pciclass060400",
278 "pciclass0604";
279
280 reg = <0x6000 0x0 0x0 0x0 0x0>;
281 interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
282 interrupt-parent = <&pic>;
283
284 #interrupt-cells = <1>;
285 interrupt-map-mask = <0 0 0 0>;
286 interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
287 };
288
289 pci_bridge@d,0 {
290 compatible = "pci0014,7a19.1",
291 "pci0014,7a19",
292 "pciclass060400",
293 "pciclass0604";
294
295 reg = <0x6800 0x0 0x0 0x0 0x0>;
296 interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
297 interrupt-parent = <&pic>;
298
299 #interrupt-cells = <1>;
300 interrupt-map-mask = <0 0 0 0>;
301 interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
302 };
303
304 pci_bridge@e,0 {
305 compatible = "pci0014,7a09.1",
306 "pci0014,7a09",
307 "pciclass060400",
308 "pciclass0604";
309
310 reg = <0x7000 0x0 0x0 0x0 0x0>;
311 interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
312 interrupt-parent = <&pic>;
313
314 #interrupt-cells = <1>;
315 interrupt-map-mask = <0 0 0 0>;
316 interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
317 };
318
319 pci_bridge@f,0 {
320 compatible = "pci0014,7a29.1",
321 "pci0014,7a29",
322 "pciclass060400",
323 "pciclass0604";
324
325 reg = <0x7800 0x0 0x0 0x0 0x0>;
326 interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
327 interrupt-parent = <&pic>;
328
329 #interrupt-cells = <1>;
330 interrupt-map-mask = <0 0 0 0>;
331 interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
332 };
333
334 pci_bridge@10,0 {
335 compatible = "pci0014,7a19.1",
336 "pci0014,7a19",
337 "pciclass060400",
338 "pciclass0604";
339
340 reg = <0x8000 0x0 0x0 0x0 0x0>;
341 interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
342 interrupt-parent = <&pic>;
343
344 #interrupt-cells = <1>;
345 interrupt-map-mask = <0 0 0 0>;
346 interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
347 };
348
349 pci_bridge@11,0 {
350 compatible = "pci0014,7a29.1",
351 "pci0014,7a29",
352 "pciclass060400",
353 "pciclass0604";
354
355 reg = <0x8800 0x0 0x0 0x0 0x0>;
356 interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
357 interrupt-parent = <&pic>;
358
359 #interrupt-cells = <1>;
360 interrupt-map-mask = <0 0 0 0>;
361 interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
362 };
363
364 pci_bridge@12,0 {
365 compatible = "pci0014,7a19.1",
366 "pci0014,7a19",
367 "pciclass060400",
368 "pciclass0604";
369
370 reg = <0x9000 0x0 0x0 0x0 0x0>;
371 interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
372 interrupt-parent = <&pic>;
373
374 #interrupt-cells = <1>;
375 interrupt-map-mask = <0 0 0 0>;
376 interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
377 };
378
379 pci_bridge@13,0 {
380 compatible = "pci0014,7a29.1",
381 "pci0014,7a29",
382 "pciclass060400",
383 "pciclass0604";
384
385 reg = <0x9800 0x0 0x0 0x0 0x0>;
386 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
387 interrupt-parent = <&pic>;
388
389 #interrupt-cells = <1>;
390 interrupt-map-mask = <0 0 0 0>;
391 interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
392 };
393
394 pci_bridge@14,0 {
395 compatible = "pci0014,7a19.1",
396 "pci0014,7a19",
397 "pciclass060400",
398 "pciclass0604";
399
400 reg = <0xa000 0x0 0x0 0x0 0x0>;
401 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
402 interrupt-parent = <&pic>;
403
404 #interrupt-cells = <1>;
405 interrupt-map-mask = <0 0 0 0>;
406 interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
407 };
408 };
409
410 isa {
411 compatible = "isa";
412 #address-cells = <2>;
413 #size-cells = <1>;
414 ranges = <1 0 0 0x18000000 0x20000>;
415 };
416 };
417};
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-04-17 23:56:25 +0800