1 files changed, 299 insertions, 0 deletions

diff --git a/arch/mips/boot/dts/qca/ar9331.dtsi b/arch/mips/boot/dts/qca/ar9331.dtsi
new file mode 100644
index 000000000..83b3c0ce1
--- /dev/null
+++ b/arch/mips/boot/dts/qca/ar9331.dtsi
@@ -0,0 +1,299 @@
+// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/ath79-clk.h>
+
+/ {
+        compatible = "qca,ar9331";
+
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                cpu@0 {
+                        device_type = "cpu";
+                        compatible = "mips,mips24Kc";
+                        clocks = <&pll ATH79_CLK_CPU>;
+                        reg = <0>;
+                };
+        };
+
+        cpuintc: interrupt-controller {
+                compatible = "qca,ar7100-cpu-intc";
+
+                interrupt-controller;
+                #interrupt-cells = <1>;
+
+                qca,ddr-wb-channel-interrupts = <2>, <3>;
+                qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>;
+        };
+
+        ref: ref {
+                compatible = "fixed-clock";
+                #clock-cells = <0>;
+        };
+
+        ahb {
+                compatible = "simple-bus";
+                ranges;
+
+                #address-cells = <1>;
+                #size-cells = <1>;
+
+                interrupt-parent = <&cpuintc>;
+
+                apb {
+                        compatible = "simple-bus";
+                        ranges;
+
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+
+                        interrupt-parent = <&miscintc>;
+
+                        ddr_ctrl: memory-controller@18000000 {
+                                compatible = "qca,ar7240-ddr-controller";
+                                reg = <0x18000000 0x100>;
+
+                                #qca,ddr-wb-channel-cells = <1>;
+                        };
+
+                        uart: serial@18020000 {
+                                compatible = "qca,ar9330-uart";
+                                reg = <0x18020000 0x14>;
+
+                                interrupts = <3>;
+
+                                clocks = <&ref>;
+                                clock-names = "uart";
+
+                                status = "disabled";
+                        };
+
+                        gpio: gpio@18040000 {
+                                compatible = "qca,ar7100-gpio";
+                                reg = <0x18040000 0x34>;
+                                interrupts = <2>;
+
+                                ngpios = <30>;
+
+                                gpio-controller;
+                                #gpio-cells = <2>;
+
+                                interrupt-controller;
+                                #interrupt-cells = <2>;
+
+                                status = "disabled";
+                        };
+
+                        pll: pll-controller@18050000 {
+                                compatible = "qca,ar9330-pll";
+                                reg = <0x18050000 0x100>;
+
+                                clocks = <&ref>;
+                                clock-names = "ref";
+
+                                #clock-cells = <1>;
+                        };
+
+                        miscintc: interrupt-controller@18060010 {
+                                compatible = "qca,ar7240-misc-intc";
+                                reg = <0x18060010 0x8>;
+
+                                interrupt-parent = <&cpuintc>;
+                                interrupts = <6>;
+
+                                interrupt-controller;
+                                #interrupt-cells = <1>;
+                        };
+
+                        rst: reset-controller@1806001c {
+                                compatible = "qca,ar7100-reset";
+                                reg = <0x1806001c 0x4>;
+
+                                #reset-cells = <1>;
+                        };
+                };
+
+                eth0: ethernet@19000000 {
+                        compatible = "qca,ar9330-eth";
+                        reg = <0x19000000 0x200>;
+                        interrupts = <4>;
+
+                        resets = <&rst 9>, <&rst 22>;
+                        reset-names = "mac", "mdio";
+                        clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+                        clock-names = "eth", "mdio";
+
+                        phy-mode = "mii";
+                        phy-handle = <&phy_port4>;
+
+                        status = "disabled";
+                };
+
+                eth1: ethernet@1a000000 {
+                        compatible = "qca,ar9330-eth";
+                        reg = <0x1a000000 0x200>;
+                        interrupts = <5>;
+                        resets = <&rst 13>, <&rst 23>;
+                        reset-names = "mac", "mdio";
+                        clocks = <&pll ATH79_CLK_AHB>, <&pll ATH79_CLK_AHB>;
+                        clock-names = "eth", "mdio";
+
+                        phy-mode = "gmii";
+
+                        status = "disabled";
+
+                        fixed-link {
+                                speed = <1000>;
+                                full-duplex;
+                        };
+
+                        mdio {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+
+                                switch10: switch@10 {
+                                        #address-cells = <1>;
+                                        #size-cells = <0>;
+
+                                        compatible = "qca,ar9331-switch";
+                                        reg = <0x10>;
+                                        resets = <&rst 8>;
+                                        reset-names = "switch";
+
+                                        interrupt-parent = <&miscintc>;
+                                        interrupts = <12>;
+
+                                        interrupt-controller;
+                                        #interrupt-cells = <1>;
+
+                                        ports {
+                                                #address-cells = <1>;
+                                                #size-cells = <0>;
+
+                                                switch_port0: port@0 {
+                                                        reg = <0x0>;
+                                                        label = "cpu";
+                                                        ethernet = <&eth1>;
+
+                                                        phy-mode = "gmii";
+
+                                                        fixed-link {
+                                                                speed = <1000>;
+                                                                full-duplex;
+                                                        };
+                                                };
+
+                                                switch_port1: port@1 {
+                                                        reg = <0x1>;
+                                                        phy-handle = <&phy_port0>;
+                                                        phy-mode = "internal";
+
+                                                        status = "disabled";
+                                                };
+
+                                                switch_port2: port@2 {
+                                                        reg = <0x2>;
+                                                        phy-handle = <&phy_port1>;
+                                                        phy-mode = "internal";
+
+                                                        status = "disabled";
+                                                };
+
+                                                switch_port3: port@3 {
+                                                        reg = <0x3>;
+                                                        phy-handle = <&phy_port2>;
+                                                        phy-mode = "internal";
+
+                                                        status = "disabled";
+                                                };
+
+                                                switch_port4: port@4 {
+                                                        reg = <0x4>;
+                                                        phy-handle = <&phy_port3>;
+                                                        phy-mode = "internal";
+
+                                                        status = "disabled";
+                                                };
+                                        };
+
+                                        mdio {
+                                                #address-cells = <1>;
+                                                #size-cells = <0>;
+
+                                                interrupt-parent = <&switch10>;
+
+                                                phy_port0: phy@0 {
+                                                        reg = <0x0>;
+                                                        interrupts = <0>;
+                                                        status = "disabled";
+                                                };
+
+                                                phy_port1: phy@1 {
+                                                        reg = <0x1>;
+                                                        interrupts = <0>;
+                                                        status = "disabled";
+                                                };
+
+                                                phy_port2: phy@2 {
+                                                        reg = <0x2>;
+                                                        interrupts = <0>;
+                                                        status = "disabled";
+                                                };
+
+                                                phy_port3: phy@3 {
+                                                        reg = <0x3>;
+                                                        interrupts = <0>;
+                                                        status = "disabled";
+                                                };
+
+                                                phy_port4: phy@4 {
+                                                        reg = <0x4>;
+                                                        interrupts = <0>;
+                                                        status = "disabled";
+                                                };
+                                        };
+                                };
+                        };
+                };
+
+                usb: usb@1b000100 {
+                        compatible = "chipidea,usb2";
+                        reg = <0x1b000000 0x200>;
+
+                        interrupts = <3>;
+                        resets = <&rst 5>;
+
+                        phy-names = "usb-phy";
+                        phys = <&usb_phy>;
+
+                        status = "disabled";
+                };
+
+                spi: spi@1f000000 {
+                        compatible = "qca,ar7100-spi";
+                        reg = <0x1f000000 0x10>;
+
+                        clocks = <&pll ATH79_CLK_AHB>;
+                        clock-names = "ahb";
+
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        status = "disabled";
+                };
+        };
+
+        usb_phy: usb-phy {
+                compatible = "qca,ar7100-usb-phy";
+
+                reset-names = "phy", "suspend-override";
+                resets = <&rst 4>, <&rst 3>;
+
+                #phy-cells = <0>;
+
+                status = "disabled";
+        };
+};