1 files changed, 104 insertions, 0 deletions
diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S
new file mode 100644
index 000000000..ee856709e
--- /dev/null
+++ b/arch/mips/fw/lib/call_o32.S
@@ -0,0 +1,104 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ *      O32 interface for the 64 (or N32) ABI.
+ *
+ *      Copyright (C) 2002, 2014  Maciej W. Rozycki
+ */
+#include <asm/asm.h>
+#include <asm/regdef.h>
+/* O32 register size.  */
+#define O32_SZREG       4
+/* Maximum number of arguments supported.  Must be even!  */
+#define O32_ARGC        32
+/* Number of static registers we save.  */
+#define O32_STATC       11
+/* Argument area frame size.  */
+#define O32_ARGSZ       (O32_SZREG * O32_ARGC)
+/* Static register save area frame size.  */
+#define O32_STATSZ      (SZREG * O32_STATC)
+/* Stack pointer register save area frame size.  */
+#define O32_SPSZ        SZREG
+/* Combined area frame size.  */
+#define O32_FRAMESZ     (O32_ARGSZ + O32_SPSZ + O32_STATSZ)
+/* Switched stack frame size.  */
+#define O32_NFRAMESZ    (O32_ARGSZ + O32_SPSZ)
+                .text
+/*
+ * O32 function call dispatcher, for interfacing 32-bit ROM routines.
+ *
+ * The standard 64 (N32) calling sequence is supported, with a0 holding
+ * a function pointer, a1 a pointer to the new stack to call the
+ * function with or 0 if no stack switching is requested, a2-a7 -- the
+ * function call's first six arguments, and the stack -- the remaining
+ * arguments (up to O32_ARGC, including a2-a7).  Static registers, gp
+ * and fp are preserved, v0 holds the result.  This code relies on the
+ * called o32 function for sp and ra restoration and this dispatcher has
+ * to be placed in a KSEGx (or KUSEG) address space.  Any pointers
+ * passed have to point to addresses within one of these spaces as well.
+ */
+NESTED(call_o32, O32_FRAMESZ, ra)
+                REG_SUBU        sp,O32_FRAMESZ
+                REG_S           ra,O32_FRAMESZ-1*SZREG(sp)
+                REG_S           fp,O32_FRAMESZ-2*SZREG(sp)
+                REG_S           gp,O32_FRAMESZ-3*SZREG(sp)
+                REG_S           s7,O32_FRAMESZ-4*SZREG(sp)
+                REG_S           s6,O32_FRAMESZ-5*SZREG(sp)
+                REG_S           s5,O32_FRAMESZ-6*SZREG(sp)
+                REG_S           s4,O32_FRAMESZ-7*SZREG(sp)
+                REG_S           s3,O32_FRAMESZ-8*SZREG(sp)
+                REG_S           s2,O32_FRAMESZ-9*SZREG(sp)
+                REG_S           s1,O32_FRAMESZ-10*SZREG(sp)
+                REG_S           s0,O32_FRAMESZ-11*SZREG(sp)
+                move            jp,a0
+                move            fp,sp
+                beqz            a1,0f
+                REG_SUBU        fp,a1,O32_NFRAMESZ
+0:
+                REG_S           sp,O32_NFRAMESZ-1*SZREG(fp)
+                sll             a0,a2,zero
+                sll             a1,a3,zero
+                sll             a2,a4,zero
+                sll             a3,a5,zero
+                sw              a6,4*O32_SZREG(fp)
+                sw              a7,5*O32_SZREG(fp)
+                PTR_LA          t0,O32_FRAMESZ(sp)
+                PTR_LA          t1,6*O32_SZREG(fp)
+                li              t2,O32_ARGC-6
+1:
+                lw              t3,(t0)
+                REG_ADDU        t0,SZREG
+                sw              t3,(t1)
+                REG_SUBU        t2,1
+                REG_ADDU        t1,O32_SZREG
+                bnez            t2,1b
+                move            sp,fp
+                jalr            jp
+                REG_L           sp,O32_NFRAMESZ-1*SZREG(sp)
+                REG_L           s0,O32_FRAMESZ-11*SZREG(sp)
+                REG_L           s1,O32_FRAMESZ-10*SZREG(sp)
+                REG_L           s2,O32_FRAMESZ-9*SZREG(sp)
+                REG_L           s3,O32_FRAMESZ-8*SZREG(sp)
+                REG_L           s4,O32_FRAMESZ-7*SZREG(sp)
+                REG_L           s5,O32_FRAMESZ-6*SZREG(sp)
+                REG_L           s6,O32_FRAMESZ-5*SZREG(sp)
+                REG_L           s7,O32_FRAMESZ-4*SZREG(sp)
+                REG_L           gp,O32_FRAMESZ-3*SZREG(sp)
+                REG_L           fp,O32_FRAMESZ-2*SZREG(sp)
+                REG_L           ra,O32_FRAMESZ-1*SZREG(sp)
+                REG_ADDU        sp,O32_FRAMESZ
+                jr              ra
+END(call_o32)

diff --git a/arch/mips/fw/lib/call_o32.S b/arch/mips/fw/lib/call_o32.S new file mode 100644 index 000000000..ee856709e --- /dev/null +++ b/arch/mips/fw/lib/call_o32.S
@@ -0,0 +1,104 @@
	1	/* SPDX-License-Identifier: GPL-2.0-or-later */
	2	/*
	3	* O32 interface for the 64 (or N32) ABI.
	4	*
	5	* Copyright (C) 2002, 2014 Maciej W. Rozycki
	6	*/
	7
	8	#include <asm/asm.h>
	9	#include <asm/regdef.h>
	10
	11	/* O32 register size. */
	12	#define O32_SZREG 4
	13	/* Maximum number of arguments supported. Must be even! */
	14	#define O32_ARGC 32
	15	/* Number of static registers we save. */
	16	#define O32_STATC 11
	17	/* Argument area frame size. */
	18	#define O32_ARGSZ (O32_SZREG * O32_ARGC)
	19	/* Static register save area frame size. */
	20	#define O32_STATSZ (SZREG * O32_STATC)
	21	/* Stack pointer register save area frame size. */
	22	#define O32_SPSZ SZREG
	23	/* Combined area frame size. */
	24	#define O32_FRAMESZ (O32_ARGSZ + O32_SPSZ + O32_STATSZ)
	25	/* Switched stack frame size. */
	26	#define O32_NFRAMESZ (O32_ARGSZ + O32_SPSZ)
	27
	28	.text
	29
	30	/*
	31	* O32 function call dispatcher, for interfacing 32-bit ROM routines.
	32	*
	33	* The standard 64 (N32) calling sequence is supported, with a0 holding
	34	* a function pointer, a1 a pointer to the new stack to call the
	35	* function with or 0 if no stack switching is requested, a2-a7 -- the
	36	* function call's first six arguments, and the stack -- the remaining
	37	* arguments (up to O32_ARGC, including a2-a7). Static registers, gp
	38	* and fp are preserved, v0 holds the result. This code relies on the
	39	* called o32 function for sp and ra restoration and this dispatcher has
	40	* to be placed in a KSEGx (or KUSEG) address space. Any pointers
	41	* passed have to point to addresses within one of these spaces as well.
	42	*/
	43	NESTED(call_o32, O32_FRAMESZ, ra)
	44	REG_SUBU sp,O32_FRAMESZ
	45
	46	REG_S ra,O32_FRAMESZ-1*SZREG(sp)
	47	REG_S fp,O32_FRAMESZ-2*SZREG(sp)
	48	REG_S gp,O32_FRAMESZ-3*SZREG(sp)
	49	REG_S s7,O32_FRAMESZ-4*SZREG(sp)
	50	REG_S s6,O32_FRAMESZ-5*SZREG(sp)
	51	REG_S s5,O32_FRAMESZ-6*SZREG(sp)
	52	REG_S s4,O32_FRAMESZ-7*SZREG(sp)
	53	REG_S s3,O32_FRAMESZ-8*SZREG(sp)
	54	REG_S s2,O32_FRAMESZ-9*SZREG(sp)
	55	REG_S s1,O32_FRAMESZ-10*SZREG(sp)
	56	REG_S s0,O32_FRAMESZ-11*SZREG(sp)
	57
	58	move jp,a0
	59
	60	move fp,sp
	61	beqz a1,0f
	62	REG_SUBU fp,a1,O32_NFRAMESZ
	63	0:
	64	REG_S sp,O32_NFRAMESZ-1*SZREG(fp)
	65
	66	sll a0,a2,zero
	67	sll a1,a3,zero
	68	sll a2,a4,zero
	69	sll a3,a5,zero
	70	sw a6,4*O32_SZREG(fp)
	71	sw a7,5*O32_SZREG(fp)
	72
	73	PTR_LA t0,O32_FRAMESZ(sp)
	74	PTR_LA t1,6*O32_SZREG(fp)
	75	li t2,O32_ARGC-6
	76	1:
	77	lw t3,(t0)
	78	REG_ADDU t0,SZREG
	79	sw t3,(t1)
	80	REG_SUBU t2,1
	81	REG_ADDU t1,O32_SZREG
	82	bnez t2,1b
	83
	84	move sp,fp
	85
	86	jalr jp
	87
	88	REG_L sp,O32_NFRAMESZ-1*SZREG(sp)
	89
	90	REG_L s0,O32_FRAMESZ-11*SZREG(sp)
	91	REG_L s1,O32_FRAMESZ-10*SZREG(sp)
	92	REG_L s2,O32_FRAMESZ-9*SZREG(sp)
	93	REG_L s3,O32_FRAMESZ-8*SZREG(sp)
	94	REG_L s4,O32_FRAMESZ-7*SZREG(sp)
	95	REG_L s5,O32_FRAMESZ-6*SZREG(sp)
	96	REG_L s6,O32_FRAMESZ-5*SZREG(sp)
	97	REG_L s7,O32_FRAMESZ-4*SZREG(sp)
	98	REG_L gp,O32_FRAMESZ-3*SZREG(sp)
	99	REG_L fp,O32_FRAMESZ-2*SZREG(sp)
	100	REG_L ra,O32_FRAMESZ-1*SZREG(sp)
	101
	102	REG_ADDU sp,O32_FRAMESZ
	103	jr ra
	104	END(call_o32)