diff options
Diffstat (limited to 'arch/mips/sgi-ip22/ip22-platform.c')
-rw-r--r-- | arch/mips/sgi-ip22/ip22-platform.c | 223 |
1 files changed, 223 insertions, 0 deletions
diff --git a/arch/mips/sgi-ip22/ip22-platform.c b/arch/mips/sgi-ip22/ip22-platform.c new file mode 100644 index 000000000..0b2002e02 --- /dev/null +++ b/arch/mips/sgi-ip22/ip22-platform.c | |||
@@ -0,0 +1,223 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | ||
2 | #include <linux/init.h> | ||
3 | #include <linux/if_ether.h> | ||
4 | #include <linux/kernel.h> | ||
5 | #include <linux/platform_device.h> | ||
6 | #include <linux/dma-mapping.h> | ||
7 | |||
8 | #include <asm/paccess.h> | ||
9 | #include <asm/sgi/ip22.h> | ||
10 | #include <asm/sgi/hpc3.h> | ||
11 | #include <asm/sgi/mc.h> | ||
12 | #include <asm/sgi/seeq.h> | ||
13 | #include <asm/sgi/wd.h> | ||
14 | |||
15 | static struct resource sgiwd93_0_resources[] = { | ||
16 | { | ||
17 | .name = "eth0 irq", | ||
18 | .start = SGI_WD93_0_IRQ, | ||
19 | .end = SGI_WD93_0_IRQ, | ||
20 | .flags = IORESOURCE_IRQ | ||
21 | } | ||
22 | }; | ||
23 | |||
24 | static struct sgiwd93_platform_data sgiwd93_0_pd = { | ||
25 | .unit = 0, | ||
26 | .irq = SGI_WD93_0_IRQ, | ||
27 | }; | ||
28 | |||
29 | static u64 sgiwd93_0_dma_mask = DMA_BIT_MASK(32); | ||
30 | |||
31 | static struct platform_device sgiwd93_0_device = { | ||
32 | .name = "sgiwd93", | ||
33 | .id = 0, | ||
34 | .num_resources = ARRAY_SIZE(sgiwd93_0_resources), | ||
35 | .resource = sgiwd93_0_resources, | ||
36 | .dev = { | ||
37 | .platform_data = &sgiwd93_0_pd, | ||
38 | .dma_mask = &sgiwd93_0_dma_mask, | ||
39 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
40 | }, | ||
41 | }; | ||
42 | |||
43 | static struct resource sgiwd93_1_resources[] = { | ||
44 | { | ||
45 | .name = "eth0 irq", | ||
46 | .start = SGI_WD93_1_IRQ, | ||
47 | .end = SGI_WD93_1_IRQ, | ||
48 | .flags = IORESOURCE_IRQ | ||
49 | } | ||
50 | }; | ||
51 | |||
52 | static struct sgiwd93_platform_data sgiwd93_1_pd = { | ||
53 | .unit = 1, | ||
54 | .irq = SGI_WD93_1_IRQ, | ||
55 | }; | ||
56 | |||
57 | static u64 sgiwd93_1_dma_mask = DMA_BIT_MASK(32); | ||
58 | |||
59 | static struct platform_device sgiwd93_1_device = { | ||
60 | .name = "sgiwd93", | ||
61 | .id = 1, | ||
62 | .num_resources = ARRAY_SIZE(sgiwd93_1_resources), | ||
63 | .resource = sgiwd93_1_resources, | ||
64 | .dev = { | ||
65 | .platform_data = &sgiwd93_1_pd, | ||
66 | .dma_mask = &sgiwd93_1_dma_mask, | ||
67 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
68 | }, | ||
69 | }; | ||
70 | |||
71 | /* | ||
72 | * Create a platform device for the GPI port that receives the | ||
73 | * image data from the embedded camera. | ||
74 | */ | ||
75 | static int __init sgiwd93_devinit(void) | ||
76 | { | ||
77 | int res; | ||
78 | |||
79 | sgiwd93_0_pd.hregs = &hpc3c0->scsi_chan0; | ||
80 | sgiwd93_0_pd.wdregs = (unsigned char *) hpc3c0->scsi0_ext; | ||
81 | |||
82 | res = platform_device_register(&sgiwd93_0_device); | ||
83 | if (res) | ||
84 | return res; | ||
85 | |||
86 | if (!ip22_is_fullhouse()) | ||
87 | return 0; | ||
88 | |||
89 | sgiwd93_1_pd.hregs = &hpc3c0->scsi_chan1; | ||
90 | sgiwd93_1_pd.wdregs = (unsigned char *) hpc3c0->scsi1_ext; | ||
91 | |||
92 | return platform_device_register(&sgiwd93_1_device); | ||
93 | } | ||
94 | |||
95 | device_initcall(sgiwd93_devinit); | ||
96 | |||
97 | static struct resource sgiseeq_0_resources[] = { | ||
98 | { | ||
99 | .name = "eth0 irq", | ||
100 | .start = SGI_ENET_IRQ, | ||
101 | .end = SGI_ENET_IRQ, | ||
102 | .flags = IORESOURCE_IRQ | ||
103 | } | ||
104 | }; | ||
105 | |||
106 | static struct sgiseeq_platform_data eth0_pd; | ||
107 | |||
108 | static u64 sgiseeq_dma_mask = DMA_BIT_MASK(32); | ||
109 | |||
110 | static struct platform_device eth0_device = { | ||
111 | .name = "sgiseeq", | ||
112 | .id = 0, | ||
113 | .num_resources = ARRAY_SIZE(sgiseeq_0_resources), | ||
114 | .resource = sgiseeq_0_resources, | ||
115 | .dev = { | ||
116 | .platform_data = ð0_pd, | ||
117 | .dma_mask = &sgiseeq_dma_mask, | ||
118 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
119 | }, | ||
120 | }; | ||
121 | |||
122 | static struct resource sgiseeq_1_resources[] = { | ||
123 | { | ||
124 | .name = "eth1 irq", | ||
125 | .start = SGI_GIO_0_IRQ, | ||
126 | .end = SGI_GIO_0_IRQ, | ||
127 | .flags = IORESOURCE_IRQ | ||
128 | } | ||
129 | }; | ||
130 | |||
131 | static struct sgiseeq_platform_data eth1_pd; | ||
132 | |||
133 | static struct platform_device eth1_device = { | ||
134 | .name = "sgiseeq", | ||
135 | .id = 1, | ||
136 | .num_resources = ARRAY_SIZE(sgiseeq_1_resources), | ||
137 | .resource = sgiseeq_1_resources, | ||
138 | .dev = { | ||
139 | .platform_data = ð1_pd, | ||
140 | }, | ||
141 | }; | ||
142 | |||
143 | /* | ||
144 | * Create a platform device for the GPI port that receives the | ||
145 | * image data from the embedded camera. | ||
146 | */ | ||
147 | static int __init sgiseeq_devinit(void) | ||
148 | { | ||
149 | unsigned int pbdma __maybe_unused; | ||
150 | int res, i; | ||
151 | |||
152 | eth0_pd.hpc = hpc3c0; | ||
153 | eth0_pd.irq = SGI_ENET_IRQ; | ||
154 | #define EADDR_NVOFS 250 | ||
155 | for (i = 0; i < 3; i++) { | ||
156 | unsigned short tmp = ip22_nvram_read(EADDR_NVOFS / 2 + i); | ||
157 | |||
158 | eth0_pd.mac[2 * i] = tmp >> 8; | ||
159 | eth0_pd.mac[2 * i + 1] = tmp & 0xff; | ||
160 | } | ||
161 | |||
162 | res = platform_device_register(ð0_device); | ||
163 | if (res) | ||
164 | return res; | ||
165 | |||
166 | /* Second HPC is missing? */ | ||
167 | if (ip22_is_fullhouse() || | ||
168 | get_dbe(pbdma, (unsigned int *)&hpc3c1->pbdma[1])) | ||
169 | return 0; | ||
170 | |||
171 | sgimc->giopar |= SGIMC_GIOPAR_MASTEREXP1 | SGIMC_GIOPAR_EXP164 | | ||
172 | SGIMC_GIOPAR_HPC264; | ||
173 | hpc3c1->pbus_piocfg[0][0] = 0x3ffff; | ||
174 | /* interrupt/config register on Challenge S Mezz board */ | ||
175 | hpc3c1->pbus_extregs[0][0] = 0x30; | ||
176 | |||
177 | eth1_pd.hpc = hpc3c1; | ||
178 | eth1_pd.irq = SGI_GIO_0_IRQ; | ||
179 | #define EADDR_NVOFS 250 | ||
180 | for (i = 0; i < 3; i++) { | ||
181 | unsigned short tmp = ip22_eeprom_read(&hpc3c1->eeprom, | ||
182 | EADDR_NVOFS / 2 + i); | ||
183 | |||
184 | eth1_pd.mac[2 * i] = tmp >> 8; | ||
185 | eth1_pd.mac[2 * i + 1] = tmp & 0xff; | ||
186 | } | ||
187 | |||
188 | return platform_device_register(ð1_device); | ||
189 | } | ||
190 | |||
191 | device_initcall(sgiseeq_devinit); | ||
192 | |||
193 | static int __init sgi_hal2_devinit(void) | ||
194 | { | ||
195 | return IS_ERR(platform_device_register_simple("sgihal2", 0, NULL, 0)); | ||
196 | } | ||
197 | |||
198 | device_initcall(sgi_hal2_devinit); | ||
199 | |||
200 | static int __init sgi_button_devinit(void) | ||
201 | { | ||
202 | if (ip22_is_fullhouse()) | ||
203 | return 0; /* full house has no volume buttons */ | ||
204 | |||
205 | return IS_ERR(platform_device_register_simple("sgibtns", -1, NULL, 0)); | ||
206 | } | ||
207 | |||
208 | device_initcall(sgi_button_devinit); | ||
209 | |||
210 | static int __init sgi_ds1286_devinit(void) | ||
211 | { | ||
212 | struct resource res; | ||
213 | |||
214 | memset(&res, 0, sizeof(res)); | ||
215 | res.start = HPC3_CHIP0_BASE + offsetof(struct hpc3_regs, rtcregs); | ||
216 | res.end = res.start + sizeof(hpc3c0->rtcregs) - 1; | ||
217 | res.flags = IORESOURCE_MEM; | ||
218 | |||
219 | return IS_ERR(platform_device_register_simple("rtc-ds1286", -1, | ||
220 | &res, 1)); | ||
221 | } | ||
222 | |||
223 | device_initcall(sgi_ds1286_devinit); | ||